On Fri, Apr 20, 2018 at 05:46:40PM +0100, Dave P Martin wrote:
> In order to make sve_save_state()/sve_load_state() more easily
> reusable and to get rid of a potential branch on context switch
> critical paths, this patch makes sve_pffr() inline and moves it to
> fpsimd.h.
>
> must be included i
On Fri, Apr 20, 2018 at 05:46:39PM +0100, Dave P Martin wrote:
> sve_pffr(), which is used to derive the base address used for
> low-level SVE save/restore routines, currently takes the relevant
> task_struct as an argument.
>
> The only accessed fields are actually part of thread_struct, so
> thi
On Fri, Apr 20, 2018 at 05:46:38PM +0100, Dave P Martin wrote:
> Having read_zcr_features() inline in cpufeature.h results in that
> header requiring #includes which make it hard to include
> elsewhere without triggering header inclusion
> cycles.
>
> This is not a hot-path function and arguably
On 25/04/18 17:35, Julien Grall wrote:
Hi Suzuki,
On 27/03/18 14:15, Suzuki K Poulose wrote:
So far we had a static stage2 page table handling code, based on a
fixed IPA of 40bits. As we prepare for a configurable IPA size per
VM, make the our stage2 page table code dynamic to do the right thin
Hi Suzuki,
On 27/03/18 14:15, Suzuki K Poulose wrote:
So far we had a static stage2 page table handling code, based on a
fixed IPA of 40bits. As we prepare for a configurable IPA size per
VM, make the our stage2 page table code dynamic to do the right thing
for a given VM.
Support for the IPA s
On 25/04/18 17:10, Julien Grall wrote:
Hi Suzuki,
On 27/03/18 14:15, Suzuki K Poulose wrote:
Allow specifying the physical address size for a new VM via
the kvm_type argument for KVM_CREATE_VM ioctl. This allows
us to finalise the stage2 page table format as early as possible
and hence perform
It's possible for userspace to control n. Sanitize n when using it as an
array index.
Note that while it appears that n must be bound to the interval [0,3]
due to the way it is extracted from addr, we cannot guarantee that
compiler transformations (and/or future refactoring) will ensure this is
th
It's possible for userspace to control intid. Sanitize intid when using
it as an array index.
At the same time, sort the includes when adding .
Found by smatch.
Signed-off-by: Mark Rutland
Cc: Christoffer Dall
Cc: Marc Zyngier
Cc: kvmarm@lists.cs.columbia.edu
---
virt/kvm/arm/vgic/vgic.c | 1
It's possible for userspace to control idx. Sanitize idx when using it
as an array index.
Found by smatch.
Signed-off-by: Mark Rutland
Cc: Catalin Marinas
Cc: Will Deacon
---
arch/arm64/kernel/ptrace.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/ar
These patches fix arm64-specific potential spectre-v1 gadgets found by
smatch when run over v4.17-rc2.
I'm still building up my smatch database, so it's possible that there are
further gadgets to be found.
For the moment I've ignored issues which appear to be cross-architecture.
Thanks,
Mark.
M
Hi Suzuki,
On 27/03/18 14:15, Suzuki K Poulose wrote:
Allow specifying the physical address size for a new VM via
the kvm_type argument for KVM_CREATE_VM ioctl. This allows
us to finalise the stage2 page table format as early as possible
and hence perform the right checks on the memory slots wit
2018-04-20 17:07+0100, Marc Zyngier:
> Radim, Paolo,
>
> Here is the first batch of KVM/arm fixes post 4.17 merge window. Not a
> lot to report, apart from the slightly scary VMID allocation race that
> has been sitting there from day 1.
>
> Please pull.
Pulled, thanks.
_
On Tue, Apr 17, 2018 at 07:37:35PM +0100, Mark Rutland wrote:
> +Basic support
> +-
> +
> +When CONFIG_ARM64_PTR_AUTH is selected, and relevant HW support is
> +present, the kernel will assign a random APIAKey value to each process
> +at exec*() time. This key is shared by all threads w
Hi Mark,
On Tue, Apr 17, 2018 at 07:37:31PM +0100, Mark Rutland wrote:
> diff --git a/arch/arm64/include/asm/mmu_context.h
> b/arch/arm64/include/asm/mmu_context.h
> index 39ec0b8a689e..caf0d3010112 100644
> --- a/arch/arm64/include/asm/mmu_context.h
> +++ b/arch/arm64/include/asm/mmu_context.h
>
The header files in arm/aarch*/include/asm/ are directly copied from
Linux, so we can't just put our own definitions in there.
Move the GICv2M MMIO frame size into a more private header, to avoid
breaking the build once the header files are synced from Linux.
Signed-off-by: Andre Przywara
---
ar
Currently we accidentally overlap the GICv2m MMIO frame with the CPU
interface region. Fix this by moving the v2m frame below the CPUI region.
Signed-off-by: Andre Przywara
---
arm/gic.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arm/gic.c b/arm/gic.c
index dd4d747d..238
Three minor fixes I stumbled upon when hacking around in kvmtool.
Not sure how the v2m support actually worked at the moment.
We might want to look at some MMIO space allocation algorithm to use for
the GIC as well, possibly merging it with the virtio MMIO allocation we
already have in place (virti
The KVM_VGIC_V3_ITS_SIZE macro from the Linux API header file already
covers the doorbell page, so we don't need to add that extra page size
in our code.
Signed-off-by: Andre Przywara
---
arm/gic.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arm/gic.c b/arm/gic.c
inde
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