On Fri, Aug 03, 2018 at 09:57:04PM +0800, Jia He wrote:
> Because kvm_vgic_sync_hwstate currently is definitly in the context
> which irq is disabled (local_irq_disable/enable). There is no need to
> call spin_lock_irqsave/restore in vgic_fold_lr_state and vgic_prune_ap_list
>
> This patch replace
On Thu, Jul 26, 2018 at 02:18:02PM +0100, Dave Martin wrote:
> On Wed, Jul 25, 2018 at 06:52:56PM +0200, Andrew Jones wrote:
> > On Wed, Jul 25, 2018 at 04:27:49PM +0100, Dave Martin wrote:
> > > On Thu, Jul 19, 2018 at 04:59:21PM +0200, Andrew Jones wrote:
> > > > On Thu, Jun 21, 2018 at 03:57:40P
On Thu, Jun 21, 2018 at 03:57:38PM +0100, Dave Martin wrote:
> This patch adds the following registers for access via the
> KVM_{GET,SET}_ONE_REG interface:
>
> * KVM_REG_ARM64_SVE_ZREG(n, i) (n = 0..31) (in 2048-bit slices)
> * KVM_REG_ARM64_SVE_PREG(n, i) (n = 0..15) (in 256-bit slices)
> * K
On Thu, Jun 21, 2018 at 03:57:36PM +0100, Dave Martin wrote:
> In order to give each vcpu its own view of the SVE registers, this
> patch adds context storage via a new sve_state pointer in struct
> vcpu_arch. An additional member sve_max_vl is also added for each
> vcpu, to determine the maximum
On Thu, Jun 21, 2018 at 03:57:24PM +0100, Dave Martin wrote:
> This series implements basic support for allowing KVM guests to use the
> Arm Scalable Vector Extension (SVE).
>
> The patches is based on torvalds/master f5b7769e (Revert "debugfs:
> inode: debugfs_create_dir uses mode permission from
Hi Dave,
I think there's a typo in the subject "to be" rather than "to by".
On Thu, Jun 21, 2018 at 03:57:33PM +0100, Dave Martin wrote:
> When a feature-dependent ID register is hidden from the guest, it
> needs to exhibit read-as-zero behaviour as defined by the Arm
> architecture, rather than
