On 09/08/18 08:40, Christoffer Dall wrote:
> On Wed, Aug 08, 2018 at 02:14:59PM +0100, Marc Zyngier wrote:
>> Although vgic-v3 now supports Group0 interrupts, it still doesn't
>> deal with Group0 SGIs. As usually with the GIC, nothing is simple:
>>
>> - ICC_SGI1R can signal SGIs of both groups,
Hi Marc,
On 08/08/2018 03:14 PM, Marc Zyngier wrote:
> Although we now have Group0 support, we still miss support for Group0
> SGIs (which amounts to handling ICC_SGI0R_EL1 and ICC_ASGI1R_EL1
> traps), and this small series adds such support.
>
> I appreciate this is *very* late for 4.19, I'd
On Wed, Aug 08, 2018 at 03:03:31PM +0100, Peter Maydell wrote:
> On 8 August 2018 at 10:11, Dave Martin wrote:
> > At its heart, I'm trying to abstract out the special behaviour of
> > all unallocated ID registers, so that we can decide at runtime which
> > ones to hide fro the guest: within the
On Wed, Aug 08, 2018 at 02:15:01PM +0100, Marc Zyngier wrote:
> In order to generate Group0 SGIs, let's add some decoding logic to
> access_gic_sgi(), and pass the generating group accordingly.
>
> Signed-off-by: Marc Zyngier
> ---
> arch/arm/kvm/coproc.c | 25 -
> 1
On Wed, Aug 08, 2018 at 02:14:58PM +0100, Marc Zyngier wrote:
> ICC_SGI1R is a 64bit system register, even on AArch32. It is thus
> pointless to have such an encoding in the 32bit cp15 array. Let's
> drop it.
>
> Signed-off-by: Marc Zyngier
> ---
> arch/arm64/kvm/sys_regs.c | 2 --
> 1 file
On Wed, Aug 08, 2018 at 02:15:00PM +0100, Marc Zyngier wrote:
> In order to generate Group0 SGIs, let's add some decoding logic to
> access_gic_sgi(), and pass the generating group accordingly.
>
> Signed-off-by: Marc Zyngier
> ---
> arch/arm64/include/asm/sysreg.h | 2 ++
>
On Wed, Aug 08, 2018 at 02:14:59PM +0100, Marc Zyngier wrote:
> Although vgic-v3 now supports Group0 interrupts, it still doesn't
> deal with Group0 SGIs. As usually with the GIC, nothing is simple:
>
> - ICC_SGI1R can signal SGIs of both groups, since GICD_CTLR.DS==1
> with KVM (as per 8.1.10,
