On Wed, Sep 26, 2018 at 02:56:22PM +0100, Julien Thierry wrote:
> When an EL2 entry of __kvm_hyp_vector is taken, it means an entry from a
> lower EL was previously taken to exit the guest. Taking that lower EL entry
> already applied BP hardening if it was needed, so there is no need to do
> it ag
On Wed, Sep 26, 2018 at 02:56:23PM +0100, Julien Thierry wrote:
> When an EL2 entry of __kvm_hyp_vector is taken, it means an entry from a
> lower EL was previously taken to exit the guest. Taking that lower EL entry
> already applied vector hardening if needed, so there is no need to do it
> again
This patch series address two Qemu issues:
- improper system clock frequency initialization
- lack of pause (virtsh suspend) time accounting
A simple test to reproduce the problem executes one or more instances
of the following command in the guest:
dd if=/dev/zero of=/dev/null &
and then p
Accumulate the total guest pause time and update the virtual counter
offset register accordingly in order to account for that time before
resuming the guest.
Signed-off-by: Bijan Mottahedeh
---
hw/intc/arm_gicv3_kvm.c | 39 +++
target/arm/cpu.h| 3 +++
Initialize the generic timer scale factor based on the counter frequency
register cntfrq_el0, and default to the current static value if necessary.
Signed-off-by: Bijan Mottahedeh
---
hw/arm/virt.c | 15 +++
target/arm/helper.c| 19 ---
target/arm/interna
On Wed, Nov 7, 2018 at 1:42 AM Christoffer Dall
wrote:
>
> On Tue, Nov 06, 2018 at 10:37:21AM -0800, Miriam Zimmerman wrote:
> > On Mon, Nov 5, 2018 at 11:45 PM Christoffer Dall
> > wrote:
> > >
> > > On Fri, Nov 02, 2018 at 02:23:45PM -0700, Miriam Zimmerman wrote:
> > > > In researching KVM_REG
On Wed, Nov 07, 2018 at 06:01:20PM +, Mark Rutland wrote:
> On Wed, Nov 07, 2018 at 05:10:31PM +, Alex Bennée wrote:
> > Not all faults handled by handle_exit are instruction emulations. For
> > example a ESR_ELx_EC_IABT will result in the page tables being updated
> > but the instruction t
On Wed, Nov 07, 2018 at 05:10:31PM +, Alex Bennée wrote:
> Not all faults handled by handle_exit are instruction emulations. For
> example a ESR_ELx_EC_IABT will result in the page tables being updated
> but the instruction that triggered the fault hasn't actually executed
> yet. We use the sim
On 7 November 2018 at 17:39, Peter Maydell wrote:
> On 7 November 2018 at 17:10, Alex Bennée wrote:
>> Not all faults handled by handle_exit are instruction emulations. For
>> example a ESR_ELx_EC_IABT will result in the page tables being updated
>> but the instruction that triggered the fault ha
On 7 November 2018 at 17:10, Alex Bennée wrote:
> Not all faults handled by handle_exit are instruction emulations. For
> example a ESR_ELx_EC_IABT will result in the page tables being updated
> but the instruction that triggered the fault hasn't actually executed
> yet. We use the simple heuristi
Not all faults handled by handle_exit are instruction emulations. For
example a ESR_ELx_EC_IABT will result in the page tables being updated
but the instruction that triggered the fault hasn't actually executed
yet. We use the simple heuristic of checking for a changed PC before
seeing if kvm_arm_h
Hi Bijan,
On Tue, Nov 06, 2018 at 04:32:27PM -0800, Bijan Mottahedeh wrote:
> This patch series address two Qemu issues:
This series should primarily go to qemu-devel (as it is a QEMU patch).
Could you please re-send the series to qemu-devel. Keeping the kvmarm
list on cc is nice, but only a li
On Tue, Nov 06, 2018 at 10:37:21AM -0800, Miriam Zimmerman wrote:
> On Mon, Nov 5, 2018 at 11:45 PM Christoffer Dall
> wrote:
> >
> > On Fri, Nov 02, 2018 at 02:23:45PM -0700, Miriam Zimmerman wrote:
> > > In researching KVM_REG_ARM_TIMER_CNT, I discovered your commit 4b7a6bf
> > > ("target-arm: k
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