Hi Marc,
On 3/9/20 1:48 PM, Marc Zyngier wrote:
> Add a small blurb describing how the event filtering API gets used.
>
> Signed-off-by: Marc Zyngier
> ---
> Documentation/virt/kvm/devices/vcpu.rst | 40 +
> 1 file changed, 40 insertions(+)
>
> diff --git a/Documentatio
Hi Marc,
On 3/9/20 1:48 PM, Marc Zyngier wrote:
> It can be desirable to expose a PMU to a guest, and yet not want the
> guest to be able to count some of the implemented events (because this
> would give information on shared resources, for example.
>
> For this, let's extend the PMUv3 device AP
On Mon, Mar 09, 2020 at 05:52:03PM +, Catalin Marinas wrote:
> I queued this series for 5.7, apart from patch 12. I'll try to fix any
> conflicts with whatever patches I'm adding but may drop some of them if
> they conflict badly with code in -next (not likely). We'll revisit at
> -rc1 to see
On Fri, Feb 28, 2020 at 03:22:19PM +, Mark Brown wrote:
> On Fri, Feb 28, 2020 at 01:37:18PM +, Catalin Marinas wrote:
> > I wonder whether it would be easier to merge all these patches at
> > 5.7-rc1, once most of the major changes went in.
>
> Only thing I can think that doing that might
Add a small blurb describing how the event filtering API gets used.
Signed-off-by: Marc Zyngier
---
Documentation/virt/kvm/devices/vcpu.rst | 40 +
1 file changed, 40 insertions(+)
diff --git a/Documentation/virt/kvm/devices/vcpu.rst
b/Documentation/virt/kvm/devices/vcp
It can be desirable to expose a PMU to a guest, and yet not want the
guest to be able to count some of the implemented events (because this
would give information on shared resources, for example.
For this, let's extend the PMUv3 device API, and offer a way to setup a
bitmap of the allowed events
It is at times necessary to prevent a guest from being able to sample
certain events if multiple CPUs share resources such as a cache level. In
this case, it would be interesting if the VMM could simply prevent certain
events from being counted instead of hiding the PMU.
Given that most events are
On Mon, Mar 09, 2020 at 12:57:51PM +0100, Andrew Jones wrote:
> This looks pretty good to me. It just needs some resquashing cleanups.
> Does Andre plan to review? I've only been reviewing with respect to
> the framework, not ITS. If no other reviews are expected, then I'll
> queue the next version
On Mon, Mar 09, 2020 at 11:24:07AM +0100, Eric Auger wrote:
> This series is a revival of an RFC series sent in Dec 2016 [1].
> Given the amount of code and the lack of traction at that time,
> I haven't respinned until now. However a recent bug found related
> to the ITS migration convinced me tha
On Mon, Mar 09, 2020 at 12:45:34PM +0100, Auger Eric wrote:
> >> - for_each_present_cpu(cpu) {
> >> + for (cpu = 0; cpu < nr_cpus; cpu++) {
> >
> > You don't mention this change in the changelog.
> Hey, you can see the changelog is pretty long already & accurate. But
> you're right I missed that
Hi,
On 3/9/20 12:19 PM, Andrew Jones wrote:
> On Mon, Mar 09, 2020 at 11:24:13AM +0100, Eric Auger wrote:
>> Detect the presence of an ITS as part of the GICv3 init
>> routine, initialize its base address and read few registers
>> the IIDR, the TYPER to store its dimensioning parameters.
>> Parse
Kegian,
In the future, please Cc me on your KVM/arm64 patches, as well as
all the reviewers mentioned in the MAINTAINERS file.
On 2020-03-09 08:57, Keqian Zhu wrote:
There is already support of enabling dirty log graually
gradually?
in small chunks for x86. This adds support for arm64.
Un
Hi Drew,
On 3/9/20 12:39 PM, Andrew Jones wrote:
> On Mon, Mar 09, 2020 at 11:24:14AM +0100, Eric Auger wrote:
>> its_enable_defaults() enable LPIs at distributor level
>> and ITS level.
>>
>> gicv3_enable_defaults must be called before.
>>
>> Signed-off-by: Eric Auger
>>
>> ---
>> v3 -> v4:
>> -
On Mon, Mar 09, 2020 at 11:24:17AM +0100, Eric Auger wrote:
...
> diff --git a/lib/arm/asm/gic-v3-its.h b/lib/arm/asm/gic-v3-its.h
> index 0096de6..956d7b8 100644
> --- a/lib/arm/asm/gic-v3-its.h
> +++ b/lib/arm/asm/gic-v3-its.h
> @@ -5,9 +5,8 @@
> *
> * This work is licensed under the terms of
On Mon, Mar 09, 2020 at 11:24:14AM +0100, Eric Auger wrote:
> its_enable_defaults() enable LPIs at distributor level
> and ITS level.
>
> gicv3_enable_defaults must be called before.
>
> Signed-off-by: Eric Auger
>
> ---
> v3 -> v4:
> - use GITS_BASER_INDIRECT & GITS_BASER_VALID in its_setup_ba
On Mon, Mar 09, 2020 at 11:24:14AM +0100, Eric Auger wrote:
> its_enable_defaults() enable LPIs at distributor level
> and ITS level.
>
> gicv3_enable_defaults must be called before.
>
> Signed-off-by: Eric Auger
>
> ---
> v3 -> v4:
> - use GITS_BASER_INDIRECT & GITS_BASER_VALID in its_setup_ba
On Mon, Mar 09, 2020 at 11:24:13AM +0100, Eric Auger wrote:
> Detect the presence of an ITS as part of the GICv3 init
> routine, initialize its base address and read few registers
> the IIDR, the TYPER to store its dimensioning parameters.
> Parse the BASER registers. As part of the init sequence w
On Mon, Mar 09, 2020 at 11:24:10AM +0100, Eric Auger wrote:
> ipi_enable() code would be reusable for other interrupts
> than IPI. Let's rename it setup_irq() and pass an interrupt
> handler pointer.
>
> Signed-off-by: Eric Auger
>
> ---
>
> v2 -> v3:
> - do not export setup_irq anymore
> ---
>
This test maps LPIs (populates the device table, the collection table,
interrupt translation tables, configuration table), migrates and make
sure the translation is correct on the destination.
Signed-off-by: Eric Auger
---
v3 -> v4:
- assert in its_get_device/collection if the id is not found
-
PROPBASER, PENDBASE and GICR_CTRL will be used for LPI management.
Signed-off-by: Eric Auger
Reviewed-by: Zenghui Yu
---
v3 -> v4:
- replace some spaces by tabs and added Zenghui's R-b
---
lib/arm/asm/gic-v3.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/lib/arm/asm/gic-v3.h b/li
Triggers LPIs through the INT command.
the test checks the LPI hits the right CPU and triggers
the right LPI intid, ie. the translation is correct.
Updates to the config table also are tested, along with inv
and invall commands.
Signed-off-by: Eric Auger
---
v3 -> v4:
- assert in lpi_handler
Add two new migration tests. One testing the migration of
a topology where collection were unmapped. The second test
checks the migration of the pending table.
Signed-off-by: Eric Auger
---
v3 -> v4:
- do not talk about odd/even CPUs, use pe0 and pe1
- comment the delay
v2 -> v3:
- tests belon
its_enable_defaults() enable LPIs at distributor level
and ITS level.
gicv3_enable_defaults must be called before.
Signed-off-by: Eric Auger
---
v3 -> v4:
- use GITS_BASER_INDIRECT & GITS_BASER_VALID in its_setup_baser()
- don't parse BASERs again in its_enable_defaults
- rename its_setup_baser
Implement main ITS commands. The code is largely inherited from
the ITS driver.
Signed-off-by: Eric Auger
---
v3 -> v4:
- device's itt now is a VGA
- pass verbose to choose whether we shall print the cmd
- use printf instead of report_info
v2 -> v3:
- do not use report() anymore
- assert if cm
Introduce additional SZ_256, SZ_8K, SZ_16K macros that will
be used by ITS tests.
Signed-off-by: Eric Auger
Reviewed-by: Thomas Huth
---
lib/libcflat.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/lib/libcflat.h b/lib/libcflat.h
index ea19f61..7092af2 100644
--- a/lib/libcflat.h
+++ b
Detect the presence of an ITS as part of the GICv3 init
routine, initialize its base address and read few registers
the IIDR, the TYPER to store its dimensioning parameters.
Parse the BASER registers. As part of the init sequence we
also init all the requested tables.
This is our first ITS test, b
Allocate the LPI configuration and per re-distributor pending table.
Set redistributor's PROPBASER and PENDBASER. The LPIs are enabled
by default in the config table.
Also introduce a helper routine that allows to set the pending table
bit for a given LPI.
Signed-off-by: Eric Auger
---
v2 -> v
Introduce an helper functions to register
- a new device, characterized by its device id and the
max number of event IDs that dimension its ITT (Interrupt
Translation Table). The function allocates the ITT.
- a new collection, characterized by its ID and the
target processing engine (PE).
This series is a revival of an RFC series sent in Dec 2016 [1].
Given the amount of code and the lack of traction at that time,
I haven't respinned until now. However a recent bug found related
to the ITS migration convinced me that this work may deserve to be
respinned and enhanced.
Tests exercis
ipi_enable() code would be reusable for other interrupts
than IPI. Let's rename it setup_irq() and pass an interrupt
handler pointer.
Signed-off-by: Eric Auger
---
v2 -> v3:
- do not export setup_irq anymore
---
arm/gic.c | 20 +++-
1 file changed, 7 insertions(+), 13 deletions
Compute the power of 2 order of a size. Use it in
page_memalign. Other users are looming.
Signed-off-by: Eric Auger
---
lib/alloc_page.c | 7 ++-
lib/alloc_page.h | 1 +
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/lib/alloc_page.c b/lib/alloc_page.c
index ed23638..7c8461a 1
Let's link getchar.o to use puts and getchar from the
tests.
Then allow tests belonging to the migration group to
trigger the migration from the test code by putting
"migrate" into the uart. Then the code can wait for the
migration completion by using getchar().
The __getchar implement is minimal
There is already support of enabling dirty log graually
in small chunks for x86. This adds support for arm64.
Under the Huawei Kunpeng 920 2.6GHz platform, I did some
tests with a 128G linux VM and counted the time taken of
memory_global_dirty_log_start, here is the numbers:
VM SizeBefore
On 2020-03-09 08:17, Zenghui Yu wrote:
On 2020/3/5 4:33, Marc Zyngier wrote:
On the other hand, public documentation is not available yet, so
that's a
bit annoying...
The IHI0069F is now available. People can have a look at:
https://developer.arm.com/docs/ihi0069/latest
Party! ;-)
On 2020/3/5 4:33, Marc Zyngier wrote:
On the other hand, public documentation is not available yet, so that's a
bit annoying...
The IHI0069F is now available. People can have a look at:
https://developer.arm.com/docs/ihi0069/latest
Thanks,
Zenghui
___
35 matches
Mail list logo
