On 04/30/2020 02:56 AM, Will Deacon wrote:
> Hi Anshuman,
>
> On Wed, Apr 29, 2020 at 03:07:15PM +0530, Anshuman Khandual wrote:
>> On 04/14/2020 03:18 PM, Anshuman Khandual wrote:
>>> This series is primarily motivated from an adhoc list from Mark Rutland
>>> during our previous ID_ISAR6
Hi all,
On Wed, 29 Apr 2020 20:56:20 +0200 Arnd Bergmann wrote:
>
> gcc-10 warns that the 32-bit zero cannot be shifted more than
> 32 bits to the right:
>
> arch/arm64/kvm/../../../virt/kvm/arm/mmu.c: In function 'clear_hyp_p4d_entry':
> arch/arm64/include/asm/pgtable.h:630:35: error: right
Hi Anshuman,
On Wed, Apr 29, 2020 at 03:07:15PM +0530, Anshuman Khandual wrote:
> On 04/14/2020 03:18 PM, Anshuman Khandual wrote:
> > This series is primarily motivated from an adhoc list from Mark Rutland
> > during our previous ID_ISAR6 discussion [1]. The current proposal also
> >
Hi Andrew,
On Wed, Apr 22, 2020 at 05:13:46PM +0100, Andrew Scull wrote:
> Errata 1165522, 1319367 and 1530923 each allow TLB entries to be
> allocated as a result of a speculative AT instruction. In order to
> avoid mandating VHE on certain affected CPUs, apply the workaround to
> both the nVHE
On Wed, Apr 29, 2020 at 08:56:20PM +0200, Arnd Bergmann wrote:
> gcc-10 warns that the 32-bit zero cannot be shifted more than
> 32 bits to the right:
>
> arch/arm64/kvm/../../../virt/kvm/arm/mmu.c: In function 'clear_hyp_p4d_entry':
> arch/arm64/include/asm/pgtable.h:630:35: error: right shift
gcc-10 warns that the 32-bit zero cannot be shifted more than
32 bits to the right:
arch/arm64/kvm/../../../virt/kvm/arm/mmu.c: In function 'clear_hyp_p4d_entry':
arch/arm64/include/asm/pgtable.h:630:35: error: right shift count >= width of
type [-Werror=shift-count-overflow]
630 | #define
Tianjia Zhang writes:
> In the current kvm version, 'kvm_run' has been included in the 'kvm_vcpu'
> structure. For historical reasons, many kvm-related function parameters
> retain the 'kvm_run' and 'kvm_vcpu' parameters at the same time. This
> patch does a unified cleanup of these remaining
Tianjia Zhang writes:
> The 'kvm_run' field already exists in the 'vcpu' structure, which
> is the same structure as the 'kvm_run' in the 'vcpu_arch' and
> should be deleted.
>
> Signed-off-by: Tianjia Zhang
> ---
> arch/powerpc/include/asm/kvm_host.h | 1 -
> arch/powerpc/kvm/book3s_hv.c
Tianjia Zhang writes:
> In the current kvm version, 'kvm_run' has been included in the 'kvm_vcpu'
> structure. For historical reasons, many kvm-related function parameters
> retain the 'kvm_run' and 'kvm_vcpu' parameters at the same time. This
> patch does a unified cleanup of these remaining
Tianjia Zhang writes:
> In the current kvm version, 'kvm_run' has been included in the 'kvm_vcpu'
> structure. For historical reasons, many kvm-related function parameters
> retain the 'kvm_run' and 'kvm_vcpu' parameters at the same time. This
> patch does a unified cleanup of these remaining
On 04/14/2020 03:18 PM, Anshuman Khandual wrote:
> This series is primarily motivated from an adhoc list from Mark Rutland
> during our previous ID_ISAR6 discussion [1]. The current proposal also
> accommodates some more suggestions from Will and Suzuki.
>
> This series adds missing 32 bit
On 2020/4/26 20:59, Thomas Huth wrote:
On 23/04/2020 13.00, Christian Borntraeger wrote:
On 23.04.20 12:58, Tianjia Zhang wrote:
On 2020/4/23 18:39, Cornelia Huck wrote:
On Thu, 23 Apr 2020 11:01:43 +0800
Tianjia Zhang wrote:
On 2020/4/23 0:04, Cornelia Huck wrote:
On Wed, 22 Apr
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