[PATCH V3 05/16] arm64/cpufeature: Introduce ID_DFR1 CPU register

2020-05-02 Thread Anshuman Khandual
This adds basic building blocks required for ID_DFR1 CPU register which provides top level information about the debug system in AArch32 state. This is added per ARM DDI 0487F.a specification. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark Rutland Cc: James Morse Cc: Suzuki K

[PATCH V3 06/16] arm64/cpufeature: Introduce ID_MMFR5 CPU register

2020-05-02 Thread Anshuman Khandual
This adds basic building blocks required for ID_MMFR5 CPU register which provides information about the implemented memory model and memory management support in AArch32 state. This is added per ARM DDI 0487F.a specification. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Mark

[PATCH V3 04/16] arm64/cpufeature: Introduce ID_PFR2 CPU register

2020-05-02 Thread Anshuman Khandual
This adds basic building blocks required for ID_PFR2 CPU register which provides information about the AArch32 programmers model which must be interpreted along with ID_PFR0 and ID_PFR1 CPU registers. This is added per ARM DDI 0487F.a specification. Cc: Catalin Marinas Cc: Will Deacon Cc: Marc

[PATCH V3 00/16] arm64/cpufeature: Introduce ID_PFR2, ID_DFR1, ID_MMFR5 and other changes

2020-05-02 Thread Anshuman Khandual
This series is primarily motivated from an adhoc list from Mark Rutland during our previous ID_ISAR6 discussion [1]. The current proposal also accommodates some more suggestions from Will and Suzuki. This series adds missing 32 bit system registers (ID_PFR2, ID_DFR1 and ID_MMFR5), adds missing

Re: [RFC PATCH v11 5/9] psci: Add hypercall service for ptp_kvm.

2020-05-02 Thread Jianyong Wu
On 2020/4/30 6:36 PM, Mark Rutland wrote: > On Tue, Apr 28, 2020 at 07:14:52AM +0100, Jianyong Wu wrote: >> On 2020/4/24 6:39 PM, Mark Rutland wrote: >>> On Fri, Apr 24, 2020 at 03:50:22AM +0100, Jianyong Wu wrote: On 2020/4/21 5:57 PM, Mark Rutland wrote: > On Tue, Apr 21, 2020 at