Hi Marc,
Thanks for the comment.
On Fri, Feb 5, 2021 at 11:24 AM Marc Zyngier wrote:
>
> Hi Jing,
>
> On 2021-02-05 04:44, Jing Zhang wrote:
> > Remove redundant check for CPU feature S2FWB in dcache flush code
> > to save some CPU cycles for every memslot flush and unmapping.
>
> What CPU
On Thu, Feb 04, 2021 at 11:08:33AM +, Quentin Perret wrote:
> On Wednesday 03 Feb 2021 at 15:31:39 (+), Will Deacon wrote:
> > On Fri, Jan 08, 2021 at 12:15:15PM +, Quentin Perret wrote:
> > > @@ -1481,7 +1486,10 @@ static void cpu_set_hyp_vector(void)
> > > struct bp_hardening_data
On Thu, Feb 04, 2021 at 10:47:08AM +, Quentin Perret wrote:
> On Wednesday 03 Feb 2021 at 14:37:10 (+), Will Deacon wrote:
> > On Fri, Jan 08, 2021 at 12:15:14PM +, Quentin Perret wrote:
> > > +static inline unsigned long __hyp_pgtable_max_pages(unsigned long
> > > nr_pages)
> > > +{
Hi Jing,
On 2021-02-05 04:44, Jing Zhang wrote:
Remove redundant check for CPU feature S2FWB in dcache flush code
to save some CPU cycles for every memslot flush and unmapping.
What CPU cycles? This is only a static branch. Can you actually
measure the overhead? What does it represent in the
On Fri, Feb 05, 2021 at 04:50:27PM +, Marc Zyngier wrote:
> On 2021-02-05 11:19, Will Deacon wrote:
> > On Fri, Feb 05, 2021 at 09:11:00AM +, Steven Price wrote:
> > > On 02/02/2021 14:11, Marc Zyngier wrote:
> > > > + for (i = 0; i < 32; ++i) {
> > > > + if (res.a0 &
On 2021-02-05 11:19, Will Deacon wrote:
On Fri, Feb 05, 2021 at 09:11:00AM +, Steven Price wrote:
On 02/02/2021 14:11, Marc Zyngier wrote:
> diff --git a/drivers/firmware/smccc/kvm_guest.c
b/drivers/firmware/smccc/kvm_guest.c
> new file mode 100644
> index ..23ce1ded88b4
> ---
On 2021-02-05 16:35, Will Deacon wrote:
On Mon, Feb 01, 2021 at 11:56:28AM +, Marc Zyngier wrote:
In order to be able to override CPU features at boot time,
let's add a command line parser that matches options of the
form "cpureg.feature=value", and store the corresponding
value into the
On Mon, Feb 01, 2021 at 11:56:28AM +, Marc Zyngier wrote:
> In order to be able to override CPU features at boot time,
> let's add a command line parser that matches options of the
> form "cpureg.feature=value", and store the corresponding
> value into the override val/mask pair.
>
> No
On 2021-02-05 11:48, Robin Murphy wrote:
On 2021-02-05 09:13, Keqian Zhu wrote:
Hi Robin and Jean,
On 2021/2/5 3:50, Robin Murphy wrote:
On 2021-01-28 15:17, Keqian Zhu wrote:
From: jiangkunkun
The SMMU which supports HTTU (Hardware Translation Table Update) can
update the access flag and
On 01/02/2021 20.56, Marc Zyngier wrote:
As we are aiming to be able to control whether we enable VHE or
not, let's always drop down to EL1 first, and only then upgrade
to VHE if at all possible.
This means that if the kernel is booted at EL2, we always start
with a nVHE init, drop to EL1 to
Hi Hector,
On 2021-02-05 12:01, Hector Martin 'marcan' wrote:
On 01/02/2021 20.56, Marc Zyngier wrote:
As we are aiming to be able to control whether we enable VHE or
not, let's always drop down to EL1 first, and only then upgrade
to VHE if at all possible.
This means that if the kernel is
The VMM may not wish to have it's own mapping of guest memory mapped
with PROT_MTE because this causes problems if the VMM has tag checking
enabled (the guest controls the tags in physical RAM and it's unlikely
the tags are correct for the VMM).
Instead add a new ioctl which allows the VMM to
Define the new system registers that MTE introduces and context switch
them. The MTE feature is still hidden from the ID register as it isn't
supported in a VM yet.
Signed-off-by: Steven Price
---
arch/arm64/include/asm/kvm_host.h | 6 ++
arch/arm64/include/asm/kvm_mte.h |
It's now safe for the VMM to enable MTE in a guest, so expose the
capability to user space.
Signed-off-by: Steven Price
---
arch/arm64/kvm/arm.c | 9 +
arch/arm64/kvm/sys_regs.c | 3 +++
2 files changed, 12 insertions(+)
diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
Add a new VM feature 'KVM_ARM_CAP_MTE' which enables memory tagging
for a VM. This will expose the feature to the guest and automatically
tag memory pages touched by the VM as PG_mte_tagged (and clear the tag
storage) to ensure that the guest cannot see stale tags, and so that
the tags are
A KVM guest could store tags in a page even if the VMM hasn't mapped
the page with PROT_MTE. So when restoring pages from swap we will
need to check to see if there are any saved tags even if !pte_tagged().
However don't check pages which are !pte_valid_user() as these will
not have been swapped
Another round of updates following review comments from Marc (thanks!).
This is rather late for v5.12, so I'll rebase again after -rc1 is out.
This series adds support for using the Arm Memory Tagging Extensions
(MTE) in a KVM guest.
This version splits the change to the tag synchronisation out
Hi Alexandru,
On 1/29/21 5:36 PM, Alexandru Elisei wrote:
> The LPI code validates a result similarly to the IPI tests, by checking if
> the target CPU received the interrupt with the expected interrupt number.
> However, the LPI tests invent their own way of checking the test results by
>
On 2021-02-05 09:13, Keqian Zhu wrote:
Hi Robin and Jean,
On 2021/2/5 3:50, Robin Murphy wrote:
On 2021-01-28 15:17, Keqian Zhu wrote:
From: jiangkunkun
The SMMU which supports HTTU (Hardware Translation Table Update) can
update the access flag and the dirty state of TTD by hardware. It is
Hi Alexandru,
On 1/29/21 5:36 PM, Alexandru Elisei wrote:
> check_acked() has several peculiarities: is the only function among the
> check_* functions which calls report() directly, it does two things
> (waits for interrupts and checks for misfired interrupts) and it also
> mixes printf,
Hi,
On 1/29/21 5:36 PM, Alexandru Elisei wrote:
> The its-trigger test checks that LPI 8195 is not delivered to the CPU while
> it is disabled at the ITS level. After that it is re-enabled and the test
> checks that the interrupt is properly asserted. After it's re-enabled and
> before the stats
On 2021-02-05 11:19, Will Deacon wrote:
On Fri, Feb 05, 2021 at 09:11:00AM +, Steven Price wrote:
On 02/02/2021 14:11, Marc Zyngier wrote:
> diff --git a/drivers/firmware/smccc/kvm_guest.c
b/drivers/firmware/smccc/kvm_guest.c
> new file mode 100644
> index ..23ce1ded88b4
> ---
On Fri, Feb 05, 2021 at 09:11:00AM +, Steven Price wrote:
> On 02/02/2021 14:11, Marc Zyngier wrote:
> > diff --git a/drivers/firmware/smccc/kvm_guest.c
> > b/drivers/firmware/smccc/kvm_guest.c
> > new file mode 100644
> > index ..23ce1ded88b4
> > --- /dev/null
> > +++
Hi Keqian,
On Fri, Feb 05, 2021 at 05:13:50PM +0800, Keqian Zhu wrote:
> > We need to accommodate the firmware override as well if we need this to be
> > meaningful. Jean-Philippe is already carrying a suitable patch in the SVA
> > stack[1].
> Robin, Thanks for pointing it out.
>
> Jean, I see
> On 4 Feb 2021, at 18:36, Dave Martin wrote:
>
> On Tue, Feb 02, 2021 at 07:52:54PM +0100, Daniel Kiss wrote:
>> CPUs that support SVE are architecturally required to support the
>> Virtualization Host Extensions (VHE), so far the kernel supported
>> SVE alongside KVM with VHE enabled. In
These patches might be responsible for some instability in one of our
stress tests. I'll send an update once I figure out what's going on.
Thanks,
David
On Thu, Jan 28, 2021 at 9:48 PM Paolo Bonzini wrote:
>
> On 28/01/21 07:05, David Stevens wrote:
> > These patches reduce how often
Hi Robin and Jean,
On 2021/2/5 3:50, Robin Murphy wrote:
> On 2021-01-28 15:17, Keqian Zhu wrote:
>> From: jiangkunkun
>>
>> The SMMU which supports HTTU (Hardware Translation Table Update) can
>> update the access flag and the dirty state of TTD by hardware. It is
>> essential to track dirty
On 02/02/2021 14:11, Marc Zyngier wrote:
From: Will Deacon
Although the SMCCC specification provides some limited functionality for
describing the presence of hypervisor and firmware services, this is
generally applicable only to functions designated as "Arm Architecture
Service Functions" and
Remove redundant check for CPU feature S2FWB in dcache flush code
to save some CPU cycles for every memslot flush and unmapping.
And move the S2FWB check to outer functions to avoid future
redundancy and keep consistent with other usage like in
access_dcsw and kvm_arch_prepare_memory_region.
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