On 2022-11-19 05:52, Reiji Watanabe wrote:
Hi Marc,
On Sun, Nov 13, 2022 at 8:46 AM Marc Zyngier wrote:
Allow userspace to write ID_DFR0_EL1, on the condition that only
the PerfMon field can be altered and be something that is compatible
with what was computed for the AArch64 view of the
On 2022-11-18 07:45, Reiji Watanabe wrote:
Hi Marc,
On Sun, Nov 13, 2022 at 8:38 AM Marc Zyngier wrote:
Even when using PMUv3p5 (which implies 64bit counters), there is
no way for AArch32 to write to the top 32 bits of the counters.
The only way to influence these bits (other than by
