On 29/03/2021 13:13, yinhua_c...@outlook.com wrote:
Hi,
> I want to boot KVM on simulators.
>
> I don't want to use QEMU since some features are only supported on
> FVP/fastmodels now.
>
> However, I cannot find documents/blogs/wiki about booting KVM on
> FVP/fastmodels.
>
> Does KVM support r
On 10/12/2020 15:58, Marc Zyngier wrote:
Hi,
> This is a rework of the NV series that I posted 10 months ago[1], as a
> For the most courageous of you, I've put out a branch[2]. Of course,
> you'll need some userspace. Andre maintains a hacked version of
> kvmtool[3] that takes a --nested
On 17/12/2020 14:13, Alexandru Elisei wrote:
> The ITS tests use the INT command like an SGI. The its_send_int() function
> kicks a CPU and then the test checks that the interrupt was observed as
> expected in check_lpi_stats(). This is done by using lpi_stats.observed and
> lpi_stats.expected, whe
On 17/12/2020 14:13, Alexandru Elisei wrote:
> The its-trigger test checks that LPI 8195 is not delivered to the CPU while
> it is disabled at the ITS level. After that it is re-enabled and the test
> checks that the interrupt is properly asserted. After it's re-enabled and
> before the stats are e
On 17/12/2020 14:13, Alexandru Elisei wrote:
> Testing that an interrupt is received as expected is done in three places:
> in check_ipi_sender(), check_irqnr() and check_acked(). check_irqnr()
> compares the interrupt ID with IPI_IRQ and records a failure in bad_irq,
> and check_ipi_sender() compa
On 17/12/2020 14:13, Alexandru Elisei wrote:
> check_acked() has several peculiarities: is the only function among the
> check_* functions which calls report() directly, it does two things
> (waits for interrupts and checks for misfired interrupts) and it also
> mixes printf, report_info and report
On 17/12/2020 14:13, Alexandru Elisei wrote:
> The IPI test works by sending IPIs to even numbered CPUs from the
> IPI_SENDER CPU (CPU1), and then checking that the other CPUs received the
> interrupts as expected. The check is done in check_acked() by the
> IPI_SENDER CPU with the help of three ar
On 17/12/2020 14:13, Alexandru Elisei wrote:
> The gicv{2,3}-active test sends an IPI from the boot CPU to itself, then
> checks that the interrupt has been received as expected. There is no need
> to use inter-processor memory synchronization primitives on code that runs
> on the same CPU, so remo
On 17/12/2020 14:13, Alexandru Elisei wrote:
> One common usage for IPIs is for one CPU to write to a shared memory
> location, send the IPI to kick another CPU, and the receiver to read from
> the same location. Proper synchronization is needed to make sure that the
> IPI receiver reads the most r
On 10/12/2020 13:20, Marc Zyngier wrote:
Hi Marc,
thanks for having a look!
> On 2020-10-20 13:30, Andre Przywara wrote:
>> Commit c9acdae1d2e7 ("arm64: Use default kernel offset when the image
>> file can't be seeked") "guessed" the arm64 kernel offset to be the old
>> default of 512K if the fi
On 20/10/2020 13:30, Andre Przywara wrote:
Hi,
> Commit c9acdae1d2e7 ("arm64: Use default kernel offset when the image
> file can't be seeked") "guessed" the arm64 kernel offset to be the old
> default of 512K if the file descriptor for the kernel image could not
> be seeked. This mostly works to
On 19/11/2020 13:41, Ard Biesheuvel wrote:
Hi,
> On Fri, 13 Nov 2020 at 19:24, Andre Przywara wrote:
>>
>> The ARM architected TRNG firmware interface, described in ARM spec
>> DEN0098, defines an ARM SMCCC based interface to a true random number
>> generator, provided by firmware.
>> This can b
On 13/11/2020 23:05, Ard Biesheuvel wrote:
> On Fri, 13 Nov 2020 at 19:24, Andre Przywara wrote:
>>
>> Hi,
>>
>> an update to v2 with some fixes and a few tweaks. Ard's patch [1] should
>> significantly reduce the frequency of arch_get_random_seed_long() calls,
>> not sure if that is enough the ap
On 05/11/2020 14:38, Mark Rutland wrote:
Hi,
> On Thu, Nov 05, 2020 at 02:29:49PM +, Mark Brown wrote:
>> On Thu, Nov 05, 2020 at 02:03:22PM +, Mark Rutland wrote:
>>> On Thu, Nov 05, 2020 at 01:41:42PM +, Mark Brown wrote:
>>
It isn't obvious to me why we don't fall through to t
On 05/11/2020 17:15, kernel test robot wrote:
> Hi Andre,
>
> I love your patch! Yet something to improve:
>
> [auto build test ERROR on linus/master]
> [also build test ERROR on v5.10-rc2 next-20201105]
> [cannot apply to arm64/for-next/core kvmarm/next arm-perf/for-next/perf]
> [If your patch i
On 05/11/2020 14:03, Mark Rutland wrote:
> On Thu, Nov 05, 2020 at 01:41:42PM +, Mark Brown wrote:
>> On Thu, Nov 05, 2020 at 12:56:55PM +, Andre Przywara wrote:
>>
>>> static inline bool __must_check arch_get_random_seed_int(unsigned int *v)
>>> {
>>> + struct arm_smccc_res res;
>>>
Marc, James, Julien, Suzuki,
argh, I am sorry, I forgot to CC: you guys on this patch. This is v2 of
Ard's original patch, fixing the endianess problem pointed out by Drew.
It's on the kvm-arm ML:
https://lists.cs.columbia.edu/pipermail/kvmarm/2020-November/043138.html
or here in my repo:
https:/
On 14/05/2020 13:20, Mark Rutland wrote:
Hi,
>
> On Thu, May 14, 2020 at 10:45:53AM +0100, Andre Przywara wrote:
>> On arm and arm64 we expose the Motorola RTC emulation to the guest,
>> but never advertised this in the device tree.
>>
>> EDK-2 seems to rely on this device, but on its hardcoded
On 27/04/2020 15:17, Marc Zyngier wrote:
Hi,
> On arm64, the maximum number of vcpus is constrained by the type
> of interrupt controller that has been selected (GICv2 imposes a
> limit of 8 vcpus, while GICv3 currently has a limit of 512).
>
> It is thus important to request this limit on the VM
On 24/04/2020 07:45, Ard Biesheuvel wrote:
Hi,
(adding Leif for EDK-2 discussion)
> On Thu, 23 Apr 2020 at 23:32, André Przywara wrote:
>>
>> On 23/04/2020 21:43, Ard Biesheuvel wrote:
[ ... kvmtool series to add CFI flash emulation allowing EDK-2 to store
variables. Sta
On 24/04/2020 09:41, Will Deacon wrote:
Hi Will,
thanks for having a look!
> On Thu, Apr 23, 2020 at 06:38:40PM +0100, Andre Przywara wrote:
>> At the moment the IRQ line for a virtio-mmio device is assigned in the
>> generic device__register() routine in devices.c, by calling back into
>> virtio
On 23/04/2020 21:43, Ard Biesheuvel wrote:
Hi Ard,
> On Thu, 23 Apr 2020 at 19:55, Ard Biesheuvel wrote:
>>
>> On Thu, 23 Apr 2020 at 19:39, Andre Przywara wrote:
>>>
>>> Hi,
>>>
>>> an update for the CFI flash emulation, addressing Alex' comments and
>>> adding direct mapping support.
>>> The
On 07/04/2020 16:15, Alexandru Elisei wrote:
> Hi,
>
> I've tested this patch by running badblocks and fio on a flash device inside a
> guest, everything worked as expected.
>
> I've also looked at the flowcharts for device operation from Intel Application
> Note 646, pages 12-21, and they seem i
On 17/04/2020 09:33, Marc Zyngier wrote:
> When a guest tries to read the active state of its interrupts,
> we currently just return whatever state we have in memory. This
> means that if such an interrupt lives in a List Register on another
> CPU, we fail to obsertve the latest active state for th
On 15/04/2020 17:20, Ard Biesheuvel wrote:
> On Wed, 15 Apr 2020 at 18:11, André Przywara wrote:
>>
>> On 15/04/2020 16:55, Ard Biesheuvel wrote:
>>> On Wed, 15 Apr 2020 at 17:43, Ard Biesheuvel wrote:
>>>>
>>>> On Tue, 7 Apr 2020 at 17:1
On 15/04/2020 16:55, Ard Biesheuvel wrote:
> On Wed, 15 Apr 2020 at 17:43, Ard Biesheuvel wrote:
>>
>> On Tue, 7 Apr 2020 at 17:15, Alexandru Elisei
>> wrote:
>>>
>>> Hi,
>>>
>>> I've tested this patch by running badblocks and fio on a flash device
>>> inside a
>>> guest, everything worked as e
On 15/04/2020 16:43, Ard Biesheuvel wrote:
Hi Ard,
> On Tue, 7 Apr 2020 at 17:15, Alexandru Elisei
> wrote:
>>
>> Hi,
>>
>> I've tested this patch by running badblocks and fio on a flash device inside
>> a
>> guest, everything worked as expected.
>>
>> I've also looked at the flowcharts for de
On 14/04/2020 11:35, Marc Zyngier wrote:
> When a guest tries to read the active state of its interrupts,
> we currently just return whatever state we have in memory. This
> means that if such an interrupt lives in a List Register on another
> CPU, we fail to obsertve the latest active state for th
On 09/04/2020 09:08, Marc Zyngier wrote:
Hi Marc,
> On Wed, 8 Apr 2020 17:50:09 +0100
> André Przywara wrote:
>
>> On 08/04/2020 15:19, Marc Zyngier wrote:
>>
>> Hi Marc,
>>
>>> On 2020-04-08 13:13, André Przywara wrote:
>>>> On 0
On 08/04/2020 15:19, Marc Zyngier wrote:
Hi Marc,
> On 2020-04-08 13:13, André Przywara wrote:
>> On 08/04/2020 11:07, Marc Zyngier wrote:
>>
>> Hi Marc,
>>
>>> Hi James,
>>>
>>> Thanks for looking into this.
>>>
On 08/04/2020 11:07, Marc Zyngier wrote:
Hi Marc,
> Hi James,
>
> Thanks for looking into this.
>
> On Mon, 6 Apr 2020 16:03:55 +0100
> James Morse wrote:
>
>> kvm_arch_timer_get_input_level() needs to get the arch_timer_context for
>> a particular vcpu, and uses kvm_get_running_vcpu() to fi
On 09/01/2020 16:54, Auger Eric wrote:
Hi Eric,
> On 1/3/20 7:12 PM, Andre Przywara wrote:
>> On Mon, 16 Dec 2019 21:47:51 +0100
>> Eric Auger wrote:
>>
>> Hi Eric,
>>
>>> If event counters are implemented check the common events
>>> required by the PMUv3 are implemented.
>>>
>>> Some are uncond
On 12/03/2019 00:32, John Gong wrote:
Hi,
> Since intid always >= VGIC_NR_PRIVATE_IRQS,
How so? The PMU and the arch timer emulation use PPIs, so intid is
definitely < VGIC_NR_PRIVATE_IRQS there.
> so then even vcpu == NULL, it never return -EINVAL.
I am not sure I follow.
To uniquely identify
On Thu, 24 Jan 2019 15:00:30 +0100
Christoffer Dall wrote:
Hi,
> VHE systems don't have to emulate the physical timer, we can simply
> assigne the EL1 physical timer directly to the VM as the host always
> uses the EL2 timers.
>
> In order to minimize the amount of cruft, AArch32 gets definitio
On Thu, 24 Jan 2019 15:00:29 +0100
Christoffer Dall wrote:
Hi,
I already looked at most of these patches earlier, without finding
serious issues, but figured I would give those without any Reviewed-by:
or Acked-by: tags a closer look.
(This patch just carries a S-o-b: tag from Marc in the kvm-ar
On 18/02/2019 09:07, Marc Zyngier wrote:
> On Fri, 15 Feb 2019 17:26:02 +
> Dave Martin wrote:
Hi,
>
>> On Fri, Feb 15, 2019 at 11:42:27AM +, Marc Zyngier wrote:
>>> On Fri, 15 Feb 2019 09:58:57 +,
>>> Andre Przywara wrote:
On Wed, 30 Jan 2019 11:39:00 +
Andre
On Thu, 24 Jan 2019 15:00:27 +0100
Christoffer Dall wrote:
Hi,
> From: Marc Zyngier
>
> Instead of having an open-coded macro, reuse the sys_reg() macro
> that does the exact same thing.
It's not the exact same thing, is it? It looks like being off by 5 bit
to me. I think the patch is still f
On 09/01/2019 04:40, kbuild test robot wrote:
Marc, Christoffer,
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git
> kvm-arm64/nv-wip-v5.0-rc1
> head: 688c386ca096f2c1f2eee386697586c88df5d5bc
> commit: 2b1265c58a873d917e99ac762e243c1274481dbf [4/75] KVM: arm/arm64:
>
On 17/12/2018 10:31, Julien Thierry wrote:
> Hi,
>
> On 14/12/2018 18:09, Andre Przywara wrote:
>> On Tue, 4 Dec 2018 11:14:33 +
>> Julien Thierry wrote:
>>
>> Hi,
>>
>>> Add an option to let user load files as non-volatile memory.
>>>
>>> An additional range of addresses is reserved for nv
On 17/12/2018 10:05, Julien Thierry wrote:
Hi Julien,
> On 14/12/2018 18:08, Andre Przywara wrote:
>> On Tue, 4 Dec 2018 11:14:31 +
>> Julien Thierry wrote:
>>
>> Hi,
>>
>>> Implement firmware image loading for arm and set the boot start
>>> address to the firmware address.
>>>
>>> Add an o
Hi Marc,
thanks for having a look!
On 29/03/17 09:30, Marc Zyngier wrote:
> On 02/02/17 16:32, Andre Przywara wrote:
>> If we need to inject an MSI into the guest, we rely at the moment on a
>> working GSI MSI routing functionality. However we can get away without
>> IRQ routing, if the host supp
On 22/03/17 15:12, Auger Eric wrote:
> Hi Andre,
>
> On 20/03/2017 19:21, Andre Przywara wrote:
>> Hi Eric,
>>
>> just fast-forwarded to the end and noticed this one:
>>
>>
>> On 06/03/17 11:34, Eric Auger wrote:
>>> Save and restore the pending tables.
>>>
>>> Pending table restore obviously requ
Hi Marc, Will,
On 09/12/16 12:03, Marc Zyngier wrote:
> On 04/11/16 17:31, Andre Przywara wrote:
>> Allocating an FDT phandle (a unique identifier) using a static
>> variable in a static inline function defined in a header file works
>> only if all users are in the same source file. So trying to a
On 20/01/17 20:07, Christoffer Dall wrote
Hi Christoffer,
> On Fri, Jan 20, 2017 at 06:07:26PM +, Andre Przywara wrote:
>> Hej Christoffer,
>>
>> On 20/01/17 10:33, Christoffer Dall wrote:
>>> Add a file to debugfs to read the in-kernel state of the vgic. We don't
>>> do any locking of the e
On 01/12/16 21:12, Wei Huang wrote:
Hi Wei,
> On 12/01/2016 02:27 PM, Andre Przywara wrote:
>> Hi,
>>
>> On 01/12/16 05:16, Wei Huang wrote:
>>> From: Christopher Covington
>>>
>>> Calculate the numbers of cycles per instruction (CPI) implied by ARM
>>> PMU cycle counter values. The code include
On 01/12/16 21:18, Christopher Covington wrote:
> On 12/01/2016 03:27 PM, Andre Przywara wrote:
Hi,
>>> + }
>>> + avg = sum / NR_SAMPLES;
>>> + printf(" sum=%"PRId64" avg=%"PRId64" avg_ipc=%"PRId64" "
>>> + "avg_cpi=%"PRId64"\n", sum, avg, i /
On 09/11/16 15:23, Andrew Jones wrote:
> On Wed, Nov 09, 2016 at 02:43:53PM +, Andre Przywara wrote:
>> Hi,
>>
>> On 09/11/16 13:08, Andrew Jones wrote:
>>> On Wed, Nov 09, 2016 at 12:35:48PM +, Andre Przywara wrote:
>>> [...]
> diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h
>
On 16/08/16 18:30, Christoffer Dall wrote:
> On Tue, Aug 16, 2016 at 05:51:06PM +0100, Andre Przywara wrote:
>> When a guest wants to map a device-ID/event-ID combination that is
>> already mapped, we may end up in a situation where an LPI is never
>> "put", thus never being freed.
>> Since the GIC
Hi,
On 22/07/16 17:20, Eric Auger wrote:
> With the advent of GICv3 ITS in-kernel emulation, KVM MSI routing
> becomes mandated for proper VIRTIO-PCI vhost integration.
>
> In QEMU, when the VIRTIO-PCI device is programmed with the MSI message,
> we previously used direct_mapping trick: this cons
Hi Marc,
On 16/07/16 11:08, Marc Zyngier wrote:
> On Fri, 15 Jul 2016 12:43:36 +0100
>> +/*
>> + * Check whether a device ID can be stored into the guest device tables.
>> + * For a direct table this is pretty easy, but gets a bit nasty for
>> + * indirect tables. We check whether the resulting gu
Hi Marc,
[...]
>> +/*
>> + * Check whether a device ID can be stored into the guest device tables.
>> + * For a direct table this is pretty easy, but gets a bit nasty for
>> + * indirect tables. We check whether the resulting guest physical address
>> + * is actually valid (covered by a memslot a
On 08/07/16 16:40, Christoffer Dall wrote:
Hi Christoffer,
thanks very much for taking a look!
> On Tue, Jul 05, 2016 at 12:23:00PM +0100, Andre Przywara wrote:
>> In the GICv3 redistributor there are the PENDBASER and PROPBASER
>> registers which we did not emulate so far, as they only make sen
On 08/07/16 14:34, Marc Zyngier wrote:
> On 05/07/16 12:23, Andre Przywara wrote:
>> The ARM GICv3 ITS emulation code goes into a separate file, but needs
>> to be connected to the GICv3 emulation, of which it is an option.
>> The ITS MMIO handlers require the respective ITS pointer to be passed in
On 08/07/16 14:09, Marc Zyngier wrote:
> On 08/07/16 13:54, André Przywara wrote:
>> On 08/07/16 11:50, Marc Zyngier wrote:
>>> On 08/07/16 11:28, Andre Przywara wrote:
>>>> Hi,
>>>>
>>>> On 07/07/16 16:00, Marc Zyngier wrote:
>>>>
On 08/07/16 11:50, Marc Zyngier wrote:
> On 08/07/16 11:28, Andre Przywara wrote:
>> Hi,
>>
>> On 07/07/16 16:00, Marc Zyngier wrote:
>>> On 05/07/16 12:22, Andre Przywara wrote:
In the moment our struct vgic_irq's are statically allocated at guest
creation time. So getting a pointer to a
On 06/07/16 22:06, Christoffer Dall wrote:
> On Tue, Jul 05, 2016 at 12:22:55PM +0100, Andre Przywara wrote:
>> The ARM GICv3 ITS MSI controller requires a device ID to be able to
>> assign the proper interrupt vector. On real hardware, this ID is
>> sampled from the bus. To be able to emulate an I
Hi Christoffer,
On 06/07/16 22:15, Christoffer Dall wrote:
> On Tue, Jul 05, 2016 at 12:22:57PM +0100, Andre Przywara wrote:
>> The kvm_io_bus framework is a nice place of holding information about
>> various MMIO regions for kernel emulated devices.
>> Add a call to retrieve the kvm_io_device str
Hi Peter,
thanks for going through the pain of looking into this!
On 19/04/16 13:34, Peter Maydell wrote:
> On 15 April 2016 at 18:11, Andre Przywara wrote:
>> Signed-off-by: Andre Przywara
>> ---
>> virt/kvm/arm/vgic/vgic_mmio.c | 21 +++--
>> 1 file changed, 19 insertions(+),
On 31/03/16 19:30, Christoffer Dall wrote:
> On Fri, Mar 25, 2016 at 02:04:23AM +, Andre Przywara wrote:
>> This series is a joint effort to re-implement KVM's GIC emulation.
>>
>> While the current implementation is centered around providing
>> efficient MMIO emulation, the hot path for most g
On 31/03/16 10:08, Christoffer Dall wrote:
> Hi Andre,
>
> [cc'ing Paolo here for his thoughts on the KVM IO bus framework]
>
> On Fri, Mar 25, 2016 at 02:04:35AM +, Andre Przywara wrote:
>> We register each register group of the distributor and redistributors
>> as separate regions of the kv
On 25/03/16 02:04, Andre Przywara wrote:
> This series is a joint effort to re-implement KVM's GIC emulation.
Forgot to mention:
This series is based on an older version of kvmarm.git/next, which is
roughly the pull request that got merged into 4.6-rc0. It applies to the
current master, so I sugge
Hi,
On 02/03/16 03:00, Will Deacon wrote:
> On Wed, Feb 24, 2016 at 03:33:08PM +, Andre Przywara wrote:
>> The pre_init stub consists of two syscalls mouting the host's FS
>> via 9pfs and then calling the actual init binary, which can now
>> use normal dynamic linking.
>> Based on the x86 code
Hi,
On 02/03/16 01:16, Will Deacon wrote:
> On Tue, Mar 01, 2016 at 04:49:37PM +, Andre Przywara wrote:
>> When we set up GSI routing to map MSIs to KVM's GSI numbers, we
>> write the current device's MSI setup into the kernel routing table.
>> However the device driver in the guest can use PC
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