On Mon, Jul 16, 2018 at 09:52:04AM +0100, Marc Zyngier wrote:
> On 14/07/18 18:05, Christoffer Dall wrote:
> > Update the documentation to reflect the ordering requirements of
> > restoring GICv2 distributor registers and remove outdated limitations in
> > the docu
On Mon, Jul 16, 2018 at 09:38:36AM +0100, Marc Zyngier wrote:
> On 14/07/18 18:05, Christoffer Dall wrote:
> > Simply letting IGROUPR be writable from userspace would break
> > migration from old kernels to newer kernels, because old kernels
> > incorrectly report interr
Update the documentation to reflect the ordering requirements of
restoring GICv2 distributor registers and remove outdated limitations in
the documentation while we're at it.
Signed-off-by: Christoffer Dall
---
Documentation/virtual/kvm/devices/arm-vgic.txt | 12 ++--
1 file changed, 6
to be returned on the write side for userspace writes.
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/vgic/vgic-mmio-v2.c | 26 +-
virt/kvm/arm/vgic/vgic-mmio-v3.c | 31 ---
virt/kvm/arm/vgic/vgic-mmio.c| 18 +-
virt/kvm/arm/vgic
, and supports legacy userspace migration from old to
new kernels.
Changes since v1:
- Bumped implementation revision field in GICD_IIDR along with changes
- Changed logic in init code to correctly detect vgic emulation type
- Rebased to v4.18-rc3
Christoffer Dall (9):
KVM: arm/arm64: vgic
to the VM.
Signed-off-by: Christoffer Dall
---
include/linux/irqchip/arm-gic.h | 1 +
virt/kvm/arm/vgic/vgic-v2.c | 3 +++
virt/kvm/arm/vgic/vgic-v3.c | 6 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
continue to ignore writes from the guest, preserving
existing functionality, for now.
Finally, we also add this field to the vgic debug logic to show the
group for all interrupts.
Signed-off-by: Christoffer Dall
---
include/kvm/arm_vgic.h | 1 +
virt/kvm/arm/vgic/vgic-debug.c | 8
as group 1, and therefore we now allow
groups to be user writable.
Signed-off-by: Christoffer Dall
---
include/kvm/arm_vgic.h | 3 +++
virt/kvm/arm/vgic/vgic-mmio-v2.c | 15 ++-
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/include/kvm/arm_vgic.h b/include/kvm
to the implementation.
Signed-off-by: Christoffer Dall
---
include/linux/irqchip/arm-gic-v3.h | 10 ++
include/linux/irqchip/arm-gic.h| 10 ++
virt/kvm/arm/vgic/vgic-mmio-v2.c | 3 ++-
virt/kvm/arm/vgic/vgic-mmio-v3.c | 3 ++-
4 files changed, 24 insertions(+), 2 deletions(-)
diff
.
Fixes: fb848db39661a "KVM: arm/arm64: vgic-new: Add GICv2 MMIO handling
framework"
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/vgic/vgic-init.c| 2 +-
virt/kvm/arm/vgic/vgic-mmio-v2.c | 8 +++-
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/virt/kvm/arm
userspace to configure the interrupts groups for GICv3.
We don't allow userspace to write the groups on GICv2 just yet, because
that would result in GICv2 guests not receiving interrupts after
migrating from an older kernel that exposes GICv2 interrupts as group 1.
Signed-off-by: Christoffer Dall
As we are about to tweak implementation aspects of the VGIC emulation,
while still preserving some level of backwards compatibility support,
add a field to keep track of the implementation revision field which is
reported to the VM and to userspace.
Signed-off-by: Christoffer Dall
---
include
On Tue, Jul 10, 2018 at 11:32:24AM +0100, Dr. David Alan Gilbert wrote:
> * Auger Eric (eric.au...@redhat.com) wrote:
> > Hi,
> >
> > On 07/10/2018 12:48 AM, Christoffer Dall wrote:
> > > On Mon, Jul 09, 2018 at 09:42:40AM +0100, Marc Zyngier wrote:
> > &g
On Mon, Jul 09, 2018 at 09:42:40AM +0100, Marc Zyngier wrote:
> On 04/07/18 10:38, Christoffer Dall wrote:
> > Implement the required MMIO accessors for GICv2 and GICv3 for the
> > IGROUPR distributor and redistributor registers.
> >
> > This can allow guests
userspace to configure the groups for interrupts. Note
that this potentially results in GICv2 guests not receiving interrupts
after migration if migrating from an older kernel that exposes GICv2
interrupts as group 1.
Cc: Andrew Jones
Signed-off-by: Christoffer Dall
---
I implemented (but stashed
to the VM.
Signed-off-by: Christoffer Dall
---
include/linux/irqchip/arm-gic.h | 1 +
virt/kvm/arm/vgic/vgic-v2.c | 3 +++
virt/kvm/arm/vgic/vgic-v3.c | 6 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
continue to ignore writes from the guest, preserving
existing functionality, for now.
Finally, we also add this field to the vgic debug logic to show the
group for all interrupts.
Signed-off-by: Christoffer Dall
---
include/kvm/arm_vgic.h | 1 +
virt/kvm/arm/vgic/vgic-debug.c | 8
.
Fixes: fb848db39661a "KVM: arm/arm64: vgic-new: Add GICv2 MMIO handling
framework"
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/vgic/vgic-init.c| 2 +-
virt/kvm/arm/vgic/vgic-mmio-v2.c | 8 +++-
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/virt/kvm/arm
As we are about to tweak implementation aspects of the VGIC emulation,
while still preserving some level of backwards compatibility support,
add a field to keep track of the implementation revision field which is
reported to the VM and to userspace.
Signed-off-by: Christoffer Dall
---
include
to the implementation.
Signed-off-by: Christoffer Dall
---
include/linux/irqchip/arm-gic-v3.h | 10 ++
include/linux/irqchip/arm-gic.h| 10 ++
virt/kvm/arm/vgic/vgic-mmio-v2.c | 3 ++-
virt/kvm/arm/vgic/vgic-mmio-v3.c | 3 ++-
4 files changed, 24 insertions(+), 2 deletions(-)
diff
to v4.18-rc3.
Changes since v1:
- Bumped implementation revision field in GICD_IIDR along with changes
- Changed logic in init code to correctly detect vgic emulation type
- Rebased to v4.18-rc3
Christoffer Dall (6):
KVM: arm/arm64: vgic: Define GICD_IIDR fields for GICv2 and GIv3
KVM: arm
ete opposite, and trapping WFE is just unnecessary overhead.
>
> Let's only enable WFE trapping if the CPU has more than a single task
> to run (that is, more than just the vcpu thread).
>
> Signed-off-by: Marc Zyngier
Reviewed-by: Christoffer Dall
> ---
> This small patchlet seem
On Fri, Jun 29, 2018 at 11:12:44AM +0100, Marc Zyngier wrote:
> On Fri, 29 Jun 2018 10:28:16 +0100,
> Christoffer Dall wrote:
> >
> > On Fri, Jun 29, 2018 at 10:11:27AM +0100, Marc Zyngier wrote:
> > > On Mon, 25 Jun 2018 12:56:03 +0100,
> > > Christoffer Dall
On Fri, Jun 29, 2018 at 10:21:27AM +0100, Marc Zyngier wrote:
> On Fri, 29 Jun 2018 10:07:50 +0100,
> Christoffer Dall wrote:
> >
> > On Fri, Jun 29, 2018 at 09:09:47AM +0100, Marc Zyngier wrote:
> > > On Thu, 28 Jun 2018 21:56:38 +0100,
> > > Christoffer Dall
On Fri, Jun 29, 2018 at 10:11:27AM +0100, Marc Zyngier wrote:
> On Mon, 25 Jun 2018 12:56:03 +0100,
> Christoffer Dall wrote:
> >
> > On Mon, Jun 25, 2018 at 12:13:47PM +0200, Christoffer Dall wrote:
> > > On Mon, Jun 25, 2018 at 10:52:41AM +0100, Peter Maydell wro
On Fri, Jun 29, 2018 at 09:09:47AM +0100, Marc Zyngier wrote:
> On Thu, 28 Jun 2018 21:56:38 +0100,
> Christoffer Dall wrote:
> >
> > On Wed, Jun 27, 2018 at 01:20:53PM +0100, Marc Zyngier wrote:
> > > Up to ARMv8.3, the combinaison of Stage-1 and Stage-2 attributes
>
On Wed, Jun 27, 2018 at 01:20:53PM +0100, Marc Zyngier wrote:
> Up to ARMv8.3, the combinaison of Stage-1 and Stage-2 attributes
> results in the strongest attribute of the two stages. This means
> that the hypervisor has to perform quite a lot of cache maintenance
> just in case the guest has
On Mon, Jun 25, 2018 at 12:13:47PM +0200, Christoffer Dall wrote:
> On Mon, Jun 25, 2018 at 10:52:41AM +0100, Peter Maydell wrote:
> > On 24 June 2018 at 23:10, Christoffer Dall wrote:
> > > This small series addresses a peculiarity of the current VGIC
> > > implement
On Mon, Jun 25, 2018 at 10:52:41AM +0100, Peter Maydell wrote:
> On 24 June 2018 at 23:10, Christoffer Dall wrote:
> > This small series addresses a peculiarity of the current VGIC
> > implementation, namely that we don't support interrupt grouping.
> >
> > KVM either
On Mon, Jun 25, 2018 at 10:59:06AM +0100, Andre Przywara wrote:
> Hi,
>
> On 24/06/18 23:10, Christoffer Dall wrote:
> > This small series addresses a peculiarity of the current VGIC
> > implementation, namely that we don't support interrupt grouping.
>
> Nice one
On Mon, Jun 25, 2018 at 10:44:17AM +0100, Marc Zyngier wrote:
> On 25/06/18 10:34, Christoffer Dall wrote:
> > On Mon, Jun 25, 2018 at 09:19:07AM +0100, Marc Zyngier wrote:
> >> On 24/06/18 23:11, Christoffer Dall wrote:
> >>> Implement the required MMIO
On Mon, Jun 25, 2018 at 09:19:07AM +0100, Marc Zyngier wrote:
> On 24/06/18 23:11, Christoffer Dall wrote:
> > Implement the required MMIO accessors for GICv2 and GICv3 for the
> > IGROUPR distributor and redistributor registers.
> >
> > This can allow guests
to the VM.
Signed-off-by: Christoffer Dall
---
include/linux/irqchip/arm-gic.h | 1 +
virt/kvm/arm/vgic/vgic-v2.c | 3 +++
virt/kvm/arm/vgic/vgic-v3.c | 6 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
.
Fixes: fb848db39661a "KVM: arm/arm64: vgic-new: Add GICv2 MMIO handling
framework"
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/vgic/vgic-mmio-v2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/virt/kvm/arm/vgic/vgic-mmio-v2.c b/virt/kvm/arm/vgic/vgic-mmio-
continue to ignore writes from the guest, preserving
existing functionality, for now.
Finally, we also add this field to the vgic debug logic to show the
group for all interrupts.
Signed-off-by: Christoffer Dall
---
include/kvm/arm_vgic.h | 1 +
virt/kvm/arm/vgic/vgic-debug.c | 8
, and the foundation model. I've run a
GICv2 guest on a GICv3 host on the foundation model.
Applies to v4.18-rc1.
Christoffer Dall (4):
KVM: arm/arm64: GICv2 IGROUPR should read as zero
KVM: arm/arm64: vgic: Add group field to struct irq
KVM: arm/arm64: Signal IRQs using their configured group
KVM
On Sat, Jun 09, 2018 at 01:09:32PM +0100, Marc Zyngier wrote:
> On Sat, 09 Jun 2018 11:06:57 +0100,
> Christoffer Dall wrote:
> >
> > On Fri, Jun 01, 2018 at 05:06:28PM +0200, Ard Biesheuvel wrote:
> > > When booting a 64 KB pages kernel on a ACPI GICv3 system that
>
On Sat, Jun 09, 2018 at 12:30:14PM +0200, Ard Biesheuvel wrote:
>
>
> > On 9 Jun 2018, at 12:06, Christoffer Dall wrote:
> >
> >> On Fri, Jun 01, 2018 at 05:06:28PM +0200, Ard Biesheuvel wrote:
> >> When booting a 64 KB pages kernel on a ACPI GICv3 system
On Fri, Jun 01, 2018 at 05:06:28PM +0200, Ard Biesheuvel wrote:
> When booting a 64 KB pages kernel on a ACPI GICv3 system that
> implements support for v2 emulation, the following warning is
> produced
>
> GICV size 0x2000 not a multiple of page size 0x1
>
> and support for v2 emulation
andates them unconditionally.
>
> Let's remove these operations.
>
> Signed-off-by: Marc Zyngier
Acked-by: Christoffer Dall
> ---
> virt/kvm/arm/mmu.c | 4
> 1 file changed, 4 deletions(-)
>
> diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c
> index ad1980d2118a
gt; entry itself (arm64 having up to 52bit PA, arm lacking PUD level).
>
> Signed-off-by: Marc Zyngier
Acked-by: Christoffer Dall
> ---
> arch/arm/include/asm/kvm_mmu.h | 4
> arch/arm64/include/asm/kvm_mmu.h | 7 +++
> virt/kvm/arm/mmu.c | 8
kvm_pgd_populate(pgd, pud);
> get_page(virt_to_page(pgd));
> kvm_flush_dcache_to_poc(pgd, sizeof(*pgd));
> }
> @@ -1092,7 +1119,7 @@ static int stage2_set_pte(struct kvm *kvm, struct
> kvm_mmu_memo
te the
> icache is an unnecessary overhead.
>
> On such systems, we can safely leave the page as being executable.
>
> Acked-by: Catalin Marinas
Acked-by: Christoffer Dall
> Signed-off-by: Marc Zyngier
> ---
> arch/arm64/include/asm/pgtable-prot.h | 14 --
> 1 f
uld just be dropped, to avoid misleading future readers who don't
have the full picture.
> + if (!cpus_have_const_cap(ARM64_HAS_STAGE2_FWB))
> + kvm_set_way_flush(vcpu);
> +
> return true;
> }
>
> --
> 2.17.1
>
Besides the usual nits on comm
ncorrect.
This is a basic "bring up Linux on the fast model" question, and doesn't
really belong on the KVM/ARM list.
Also note, that if you do want to play with KVM on an Arm system, then
Cortex-A9 does not have the virtualization extensions.
Hope this helps,
-Christoffer
>
>
&g
On Fri, May 18, 2018 at 09:04:40PM +0800, Jia He wrote:
>
>
> On 5/18/2018 5:48 PM, Marc Zyngier Wrote:
> > On 18/05/18 10:27, Jia He wrote:
> >> If it passes addr=0x20292,size=0xfe00 to unmap_stage2_range->
> >> ...->unmap_stage2_ptes, unmap_stage2_ptes will get addr=0x20292,
> >>
On Wed, Jun 06, 2018 at 09:22:52AM +0300, Raz wrote:
> Hello
> KVM arm was introduced in 3.9. I wish to debug it through fast models.
> My problem is that FVP uses 3.4 kernel, and 3.9 from "git://
> git.kernel.org/pub/scm/virt/kvm/kvm.git " does not boot it.
>
> Do you have a ready kernel for
t may
> currently occur for kernel threads that have acquired an mm via
> use_mm().
Reviewed-by: Christoffer Dall <christoffer.d...@arm.com>
>
> Signed-off-by: Dave Martin <dave.mar...@arm.com>
> Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
> Reviewe
On Thu, May 24, 2018 at 03:37:15PM +0100, Dave Martin wrote:
> On Thu, May 24, 2018 at 12:06:59PM +0200, Christoffer Dall wrote:
> > On Thu, May 24, 2018 at 10:50:56AM +0100, Dave Martin wrote:
> > > On Thu, May 24, 2018 at 10:33:50AM +0200, Chri
On Thu, May 24, 2018 at 10:50:56AM +0100, Dave Martin wrote:
> On Thu, May 24, 2018 at 10:33:50AM +0200, Christoffer Dall wrote:
> > On Wed, May 23, 2018 at 04:03:37PM +0100, Dave Martin wrote:
> > > On Wed, May 23, 2018 at 03:56:57PM +0100, Catalin Marinas wrote:
> >
valuating the
> static branch check for the GICv3 case, even though we can't have
> vgic_v2_cpuif_trap and vgic_v3_cpuif_trap true simultaneously
> unless we have a GICv3 and GICv2 on the host: that sounds stupid,
> but I haven't satisfied myself that it can't happen.
>
&
ese assignments are not
> needed.
>
> This patch removes the redundant assignments, and simplifies some
> if-nesting that becomes trivial as a result.
>
> No functional change.
>
> Signed-off-by: Dave Martin <dave.mar...@arm.com>
> Acked-by: Marc Zyngier <marc.zyng...@
the
> architecturally invalid configuration of SVE without VHE, so if
> this situation is detected at kvm_init() time then KVM will be
> disabled.
>
> Signed-off-by: Dave Martin <dave.mar...@arm.com>
>
> ---
>
> * Tags stripped since v8, please reconfirm if possible
On Wed, May 23, 2018 at 04:03:37PM +0100, Dave Martin wrote:
> On Wed, May 23, 2018 at 03:56:57PM +0100, Catalin Marinas wrote:
> > On Wed, May 23, 2018 at 02:31:59PM +0100, Dave P Martin wrote:
> > > On Wed, May 23, 2018 at 01:48:12PM +0200, Christoffer Dall wrote:
> >
On Wed, May 23, 2018 at 08:35:13PM +0100, Alex Bennée wrote:
>
> Dave Martin writes:
>
> > To make the lazy FPSIMD context switch trap code easier to hack on,
> > this patch converts it to C.
> >
> > This is not amazingly efficient, but the trap should typically only
> > be
On Wed, May 23, 2018 at 03:40:26PM +0100, Dave Martin wrote:
> On Wed, May 23, 2018 at 03:34:20PM +0100, Alex Bennée wrote:
> >
> > Dave Martin <dave.mar...@arm.com> writes:
> >
> > > From: Christoffer Dall <christoffer.d...@linaro.org>
> >
On Tue, May 22, 2018 at 05:05:08PM +0100, Dave Martin wrote:
> Currently the FPSIMD handling code uses the condition task->mm ==
> NULL as a hint that task has no FPSIMD register context.
>
> The ->mm check is only there to filter out tasks that cannot
> possibly have FPSIMD context loaded, for
On Wed, May 16, 2018 at 11:32:17AM +0100, Dave Martin wrote:
> On Wed, May 16, 2018 at 10:25:40AM +0100, Marc Zyngier wrote:
> > [+Dave]
> >
> > Hi Nianyao,
> >
> > On 16/05/18 10:08, Tangnianyao (ICT) wrote:
> > > Add last_fpsimd_trap to notify if guest last exit reason is handling
> > >
mantics fixup_guest_exit(). For now there is no
> possibility of a spurious FPSIMD trap, so the function always
> returns true, but this allows it to be tail-called with a single
> return statement.
>
> Signed-off-by: Dave Martin <dave.mar...@arm.com>
> Reviewed-by: Marc Zyngier <marc
goto error;
> +
> + ret = create_hyp_mappings(fpsimd, fpsimd + 1, PAGE_HYP);
> + if (ret)
> + goto error;
> +
> + vcpu->arch.host_thread_info = kern_hyp_va(ti);
> + vcpu->arch.host_fpsimd_state = kern_hyp_va(fpsimd);
> +error:
> +
SHIFT has not been used since commit
> 1ea66d27e7b0 ("arm64: KVM: Move away from the assembly version of
> the world switch"), so this patch gets rid of that too.
>
> No functional change.
>
> Signed-off-by: Dave Martin <dave.mar...@arm.com>
> Rev
On Wed, May 09, 2018 at 05:13:03PM +0100, Dave Martin wrote:
> In fixup_guest_exit(), there are a couple of cases where after
> checking what the exit code was, we assign it explicitly with the
> value it already had.
>
> Assuming this is not indicative of a bug, these assignments are not
>
table line.
>
> I couldn't reproduce the full lockdep splat on my setup, but at least
> could show one instance and prove that these patches fixes that.
>
>
For the series:
Acked-by: Christoffer Dall <christoffer.d...@arm.com>
Thanks for fixing this,
-Christoffer
Hi Jan,
On Fri, May 04, 2018 at 01:03:44PM +0200, Jan Glauber wrote:
> Hi all,
>
> enabling lockdep I see the following reported in the host when I start a kvm
> guest:
>
> [12399.954245]CPU0CPU1
> [12399.958762]
> [12399.963279]
On Tue, May 01, 2018 at 02:00:43PM +0100, Punit Agrawal wrote:
> Hi Suzuki,
>
> Thanks for having a look.
>
> Suzuki K Poulose writes:
>
> > On 01/05/18 11:26, Punit Agrawal wrote:
> >> Introduce helpers to abstract architectural handling of the conversion
> >> of pfn
nule) which can be useful on cores that
> support mapping larger block sizes in the TLB entries.
>
> Signed-off-by: Punit Agrawal <punit.agra...@arm.com>
> Cc: Christoffer Dall <christoffer.d...@arm.com>
> Cc: Marc Zyngier <marc.zyng...@arm.com>
> Cc: Russell
the operations when we introduce
> PUD hugepages, let's share them across the different pagesizes.
>
> Signed-off-by: Punit Agrawal <punit.agra...@arm.com>
> Reviewed-by: Christoffer Dall <christoffer.d...@arm.com>
> Cc: Marc Zyngier <marc.zyng
On Mon, Apr 30, 2018 at 11:07:43AM +0200, Eric Auger wrote:
> Now all the internals are ready to handle multiple redistributor
> regions, let's allow the userspace to register them.
>
> Signed-off-by: Eric Auger <eric.au...@redhat.com>
Reviewed-by: Christoffer Dall <chr
rdreg)
> }
> bool vgic_v3_rdist_overlap(struct kvm *kvm, gpa_t base, size_t size);
>
> +static inline bool vgic_dist_overlap(struct kvm *kvm, gpa_t base, size_t
> size)
> +{
> + struct vgic_dist *d = >arch.vgic;
> +
> + return (base + size > d->vgic_dist_base) &&
> + (base < d->vgic_dist_base + KVM_VGIC_V3_DIST_SIZE);
> +}
> +
> int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
>u32 devid, u32 eventid, struct vgic_irq **irq);
> struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi);
> --
> 2.5.5
>
Besides the nit about using list_last_entry():
Reviewed-by: Christoffer Dall <christoffer.d...@arm.com>
___
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
DDR_TYPE_REDIST, this new attribute allows
> to declare several separate redistributor regions.
>
> So the whole redist space does not need to be contiguous anymore.
>
> Signed-off-by: Eric Auger <eric.au...@redhat.com>
Acked-by: Christoffer Dall <christoffer.d...@arm.com&g
On Sun, Apr 29, 2018 at 02:05:07PM +0100, Marc Zyngier wrote:
> On Sun, 29 Apr 2018 14:34:32 +0200
> Christoffer Dall <christoffer.d...@arm.com> wrote:
>
> > On Fri, Apr 27, 2018 at 03:51:02PM +0100, Marc Zyngier wrote:
> > > Proxying the cpuif accesses at EL2 makes
On Fri, Apr 27, 2018 at 04:15:05PM +0200, Eric Auger wrote:
> Let's raise the number of supported vcpus along with
> vgic v3 now that HW is looming with more physical CPUs.
>
> Signed-off-by: Eric Auger <eric.au...@redhat.com>
Acked-by: Christoffer Dall <chr
tually check potential base address inconsistencies.
>
> Signed-off-by: Eric Auger <eric.au...@redhat.com>
Reviewed-by: Christoffer Dall <christoffer.d...@arm.com>
>
> ---
>
> v3 -> v4:
> - use kvm_debug
> ---
> virt/kvm/arm/vgic/vgic-v3.c | 19
already been set. Initialize this latter
> in kvm_vgic_vcpu_early_init().
>
> Signed-off-by: Eric Auger <eric.au...@redhat.com>
Acked-by: Christoffer Dall <christoffer.d...@arm.com>
> ---
> virt/kvm/arm/vgic/vgic-init.c| 3 +++
> virt/kvm/arm/vgic/vgic-mmio-v3.
_t
> +vgic_v3_rd_region_size(struct kvm *kvm, struct vgic_redist_region *rdreg)
> +{
> + if (!rdreg->count)
> + return atomic_read(>online_vcpus) *
> KVM_VGIC_V3_REDIST_SIZE;
> + else
> + return rdreg->count * KVM_VGIC_V3_R
d-by: Suzuki K Poulose <suzuki.poul...@arm.com>
> Tested-by: Suzuki K Poulose <suzuki.poul...@arm.com>
> Signed-off-by: Marc Zyngier <marc.zyng...@arm.com>
Otherwise:
Reviewed-by: Christoffer Dall <christoffer.d...@arm.com>
> ---
> arch/arm64/kvm/hyp/vgic-v2-cpuif
DDR_TYPE_REDIST, this new attribute allows
> to declare several separate redistributor regions.
>
> So the whole redist space does not need to be contiguous anymore.
>
> Signed-off-by: Eric Auger <eric.au...@redhat.com>
> Reviewed-by: Peter Maydell <peter.mayd.
On Fri, Apr 13, 2018 at 10:20:57AM +0200, Eric Auger wrote:
> Now all the internals are ready to handle multiple redistributor
> regions, let's allow the userspace to register them.
>
> Signed-off-by: Eric Auger
>
> ---
>
> v2 -> v3:
> - early exit if
> Also, provide trivial implementations of required kvm_s2pud_* helpers
> to allow sharing of code with arm32.
>
> Signed-off-by: Punit Agrawal <punit.agra...@arm.com>
> Cc: Christoffer Dall <christoffer.d...@arm.com>
> Cc: Marc Zyngier <marc.zyng...@arm.com>
>
g PUD hugepages
> at stage 2 - which are supported on arm64 but do not exist on arm.
>
> Signed-off-by: Punit Agrawal <punit.agra...@arm.com>
> Cc: Christoffer Dall <christoffer.d...@arm.com>
> Cc: Marc Zyngier <marc.zyng...@arm.com>
> Cc: Russell King <li..
the operations when we introduce
> PUD hugepages, let's share them across the different pagesizes.
>
> Signed-off-by: Punit Agrawal <punit.agra...@arm.com>
> Cc: Christoffer Dall <christoffer.d...@arm.com>
> Cc: Marc Zyngier <marc.zyng
nule) which can be useful on cores that
> support mapping larger block sizes in the TLB entries.
>
> Signed-off-by: Punit Agrawal <punit.agra...@arm.com>
> Cc: Christoffer Dall <christoffer.d...@arm.com>
> Cc: Marc Zyngier <marc.zyng...@arm.com>
> Cc: Russell
it doesn't matter how we configure HCR_EL2.{API,APK}, so we don't
> bother setting them.
>
> This does not enable support for KVM guests, since KVM manages HCR_EL2
> itself when running VMs.
>
> Signed-off-by: Mark Rutland <mark.rutl...@arm.com>
> Cc: Christoffer Dall <
feature were really missing.
>
> Signed-off-by: Mark Rutland <mark.rutl...@arm.com>
> Cc: Christoffer Dall <cd...@kernel.org>
> Cc: Marc Zyngier <marc.zyng...@arm.com>
> Cc: kvmarm@lists.cs.columbia.edu
> ---
> arch/arm64/kvm/handle_exit.c | 18 ++
>
; We now use mov_q to generate the HCR_EL2 value, as we use when
> configuring other registers in head.S.
>
> Signed-off-by: Mark Rutland <mark.rutl...@arm.com>
> Cc: Catalin Marinas <catalin.mari...@arm.com>
> Cc: Christoffer Dall <cd...@kernel.org>
> C
* noncompliant.
> + *
> + * Just in case this mismatch is seen, detect it, warn and give
> + * up. Supporting this forbidden configuration in Hyp would be
> + * pointless.
> + */
> + if (system_supports_sve() && !has_vhe()) {
> + kv
preempt_disable();
>
> - /* Flush FP/SIMD state that can't survive guest entry/exit */
> - kvm_fpsimd_flush_cpu_state();
> -
> kvm_pmu_flush_hwstate(vcpu);
>
> local_irq_disable();
> --
> 2.1.4
>
> ___
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> kvmarm@lists.cs.columbia.edu
> https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Acked-by: Christoffer Dall <christoffer.d...@arm.com>
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On Thu, Apr 26, 2018 at 03:11:49PM +0100, Dave Martin wrote:
> On Thu, Apr 26, 2018 at 01:21:22PM +0200, Christoffer Dall wrote:
> > On Fri, Apr 20, 2018 at 05:46:37PM +0100, Dave Martin wrote:
> > > This patch refactors KVM to align the host and guest FPSIMD
> > > s
KVM: arm/arm64: vgic: fix possible spectre-v1 in vgic_mmio_read_apr()
For the KVM-related parts:
Acked-by: Christoffer Dall <christoffer.d...@arm.com>
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t; preserving other things such as the host's system registers. To
> avoid ABI churn, the redundant storage space in host_cpu_context is
> not removed for now.
>
> arch/arm is not addressed by this patch and continues to use its
> current save/restore logic. It could provide impl
On Thu, Apr 26, 2018 at 11:56:10AM +0200, Auger Eric wrote:
>
>
> On 04/24/2018 11:08 PM, Christoffer Dall wrote:
> > On Fri, Apr 13, 2018 at 10:20:55AM +0200, Eric Auger wrote:
> >> On vcpu first run, we eventually know the actual number of vcpus.
> >> This is
On Thu, Apr 26, 2018 at 11:25:06AM +0200, Auger Eric wrote:
> Hi Christoffer,
>
> On 04/24/2018 11:07 PM, Christoffer Dall wrote:
> > On Fri, Apr 13, 2018 at 10:20:54AM +0200, Eric Auger wrote:
> >> As we are going to register several redist regions,
> >> vgic
On Thu, Apr 26, 2018 at 10:29:35AM +0200, Auger Eric wrote:
> Hi Christoffer,
> On 04/24/2018 11:07 PM, Christoffer Dall wrote:
> > On Fri, Apr 13, 2018 at 10:20:53AM +0200, Eric Auger wrote:
> >> We introduce a new helper to check there is no overlap between
>
On Thu, Apr 26, 2018 at 09:32:49AM +0200, Auger Eric wrote:
> Hi Christoffer,
>
> On 04/24/2018 06:47 PM, Christoffer Dall wrote:
> > On Fri, Apr 13, 2018 at 10:20:52AM +0200, Eric Auger wrote:
> >> We introduce a new helper that creates and inserts a new redistributor
&g
On Tue, Apr 24, 2018 at 05:50:37PM +0100, Peter Maydell wrote:
> On 24 April 2018 at 17:46, Christoffer Dall <christoffer.d...@arm.com> wrote:
> > On Fri, Apr 13, 2018 at 10:20:48AM +0200, Eric Auger wrote:
> >> --- a/Documentation/virtual/kvm/devices/arm-vgic-v3.txt
define KVM_VGIC_V3_ADDR_TYPE_DIST 2
> +#define KVM_VGIC_V3_ADDR_TYPE_REDIST 3
> +#define KVM_VGIC_ITS_ADDR_TYPE 4
> +#define KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION 5
>
> #define KVM_VGIC_V3_DIST_SIZESZ_64K
On Fri, Apr 13, 2018 at 10:20:55AM +0200, Eric Auger wrote:
> On vcpu first run, we eventually know the actual number of vcpus.
> This is a synchronization point to check all redistributors regions
> were assigned.
Isn't it the other way around? We want to check that all redistributors
(one for
On Fri, Apr 13, 2018 at 10:20:54AM +0200, Eric Auger wrote:
> As we are going to register several redist regions,
> vgic_register_all_redist_iodevs() may be called several times. We need
> to register a redist_iodev for a given vcpu only once.
Wouldn't it be more natural to change that caller to
On Fri, Apr 13, 2018 at 10:20:53AM +0200, Eric Auger wrote:
> We introduce a new helper to check there is no overlap between
> dist region (if set) and registered rdist regions. This both
> handles the case of legacy single rdist region (implicitly sized
> with the number of online vcpus) and the
rdist_free_slot(struct list_head *rdregs);
> +
> int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
>u32 devid, u32 eventid, struct vgic_irq **irq);
> struct vgic_its *vgic_msi_to_its(struct kvm *kvm, struct kvm_msi *msi);
> --
> 2.5.5
>
Asides from the above:
Reviewed-by: Christoffer Dall <christoffer.d...@arm.com>
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