Re: [PATCH v3 08/18] arm/arm64: KVM: Add PSCI version selection API

Hi Marc, [ I know we're discussing the overall approach in parallel, but here are some comments on the specifics of this patch, should it end up being used in some capacity ] On Thu, Feb 01, 2018 at 11:46:47AM +, Marc Zyngier wrote: > Although we've implemented PSCI 1.0 and 1.1, nothing

Re: [PATCH v3 08/18] arm/arm64: KVM: Add PSCI version selection API

On Sat, Feb 03, 2018 at 11:59:32AM +, Marc Zyngier wrote: > On Fri, 2 Feb 2018 21:17:06 +0100 > Andrew Jones wrote: > > > On Thu, Feb 01, 2018 at 11:46:47AM +, Marc Zyngier wrote: > > > Although we've implemented PSCI 1.0 and 1.1, nothing can select them > > > Since

Re: [PATCH v3 07/18] arm/arm64: KVM: Implement PSCI 1.0 support

h mentioning that there are other changes between v0.2 but they are clarifications or relaxations and therefore don't require additional changes. Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> > > Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> > --- > inclu

Re: [PATCH v3 06/18] arm/arm64: KVM: Add smccc accessors to PSCI code

On Thu, Feb 01, 2018 at 11:46:45AM +, Marc Zyngier wrote: > Instead of open coding the accesses to the various registers, > let's add explicit SMCCC accessors. > Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> > Signed-off-by: Marc Zyngier <marc.zyng...@a

Re: [PATCH v3 03/18] arm64: KVM: Increment PC after handling an SMC trap

the handler, as the guest is otherwise forever > stuck... > Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> > Cc: sta...@vger.kernel.org > Fixes: acfb3b883f6d ("arm64: KVM: Fix SMCCC handling of unimplemented SMC/HVC > calls") > Signed-off-by:

Re: [PATCH v3 05/18] arm/arm64: KVM: Add PSCI_VERSION helper

On Thu, Feb 01, 2018 at 11:46:44AM +, Marc Zyngier wrote: > As we're about to trigger a PSCI version explosion, it doesn't > hurt to introduce a PSCI_VERSION helper that is going to be > used everywhere. > Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> >

Re: [PATCH v3 04/18] arm/arm64: KVM: Consolidate the PSCI include files

On Thu, Feb 01, 2018 at 11:46:43AM +, Marc Zyngier wrote: > As we're about to update the PSCI support, and because I'm lazy, > let's move the PSCI include file to include/kvm so that both > ARM architectures can find it. > Acked-by: Christoffer Dall <christoffer.d...@linaro.org

Re: [PATCH] KVM: arm/arm64: Fix arch timers with userspace irqchips

On Wed, Jan 31, 2018 at 2:16 PM, Andrew Jones <drjo...@redhat.com> wrote: > On Wed, Jan 31, 2018 at 12:23:09PM +0100, Christoffer Dall wrote: >> Did I mention that I hate this feature, which keeps breaking, and >> which really isn't covered by a simple kvm-unit-test script? &

[PATCH v2] KVM: arm/arm64: Fix arch timers with userspace irqchips

;ag...@suse.de> Cc: <sta...@vger.kernel.org> # v4.12+ Fixes: d9e139778376 ("KVM: arm/arm64: Support arch timers with a userspace gic") Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- This conflicts horribly with everything when applied to either kvmarm/queue

Re: [PATCH] KVM: arm/arm64: Fix arch timers with userspace irqchips

On Wed, Jan 31, 2018 at 12:19 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: > On 31/01/18 10:05, Christoffer Dall wrote: >> On Wed, Jan 31, 2018 at 09:37:31AM +, Marc Zyngier wrote: >>> On 30/01/18 12:46, Christoffer Dall wrote: >>>> When introducing suppor

Re: [PULL 01/28] arm64: KVM: Hide PMU from guests when disabled

Hi Drew, On Wed, Jan 31, 2018 at 11:54 AM, Andrew Jones <drjo...@redhat.com> wrote: > On Wed, Jan 31, 2018 at 10:34:40AM +0100, Christoffer Dall wrote: >> From: Andrew Jones <drjo...@redhat.com> >> >> Since commit 93390c0a1b20 ("arm64: KVM: Hide unsupport

Re: [PATCH] KVM: arm/arm64: Fix arch timers with userspace irqchips

On Wed, Jan 31, 2018 at 09:37:31AM +, Marc Zyngier wrote: > On 30/01/18 12:46, Christoffer Dall wrote: > > When introducing support for irqchip in userspace we needed a way to > > mask the timer signal to prevent the guest continuously exiting due to a > > screaming t

[PULL 27/28] KVM: arm/arm64: Fix userspace_irqchip_in_use counting

-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/arm.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c index 639dca0c0560..04ee7a327870 100644 --- a/virt/k

[PULL 26/28] KVM: arm/arm64: Fix incorrect timer_is_pending logic

ate() in kvm_arch_timer_get_input_level(). Reported-by: Tomasz Nowicki <t...@semihalf.com> Tested-by: Tomasz Nowicki <t...@semihalf.com> Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- vir

[PULL 28/28] KVM: arm/arm64: Fixup userspace irqchip static key optimization

n in use. This fixes an issue when running in-kernel irqchip VMs alongside userspace irqchip VMs. Acked-by: Marc Zyngier <marc.zyng...@arm.com> Fixes: c44c232ee2d3 ("KVM: arm/arm64: Avoid work when userspace iqchips are not used") Signed-off-by: Christoffer Dall <christoffer.d...@li

[PULL 24/28] KVM: arm/arm64: Handle CPU_PM_ENTER_FAILED

calls cpu_hyp_reset() to make sure the hyp-stub is loaded before reloading KVM. Fixes: 67f691976662 ("arm64: kvm: allows kvm cpu hotplug") Cc: <sta...@vger.kernel.org> # v4.7+ CC: Lorenzo Pieralisi <lorenzo.pieral...@arm.com> Reviewed-by: Christoffer Dall <christoffer.d...@linaro.

[PULL 23/28] arm64: mm: Add additional parameter to uaccess_ttbr0_disable

conflict with commit 6b88a32c7af68895134872cdec3b6bfdb532d94e ("arm64: kpti: Fix the interaction between ASID switching and software PAN"). Cc: Will Deacon <will.dea...@arm.com> Acked-by: Catalin Marinas <catalin.mari...@arm.com> Acked-by: Marc Zyngier <marc.zyng...@arm.com>

[PULL 20/28] KVM: arm/arm64: Preserve Exec permission across R/W permission faults

; RWX Instead, we can lookup the existing PTE/PMD and clear the XN bit in the new entry if it was already cleared in the old one, leadig to a much nicer fault sequence: X -> ROX -> RWX Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> Signed-off-by: Marc Zyngier <

[PULL 18/28] KVM: arm/arm64: Limit icache invalidation to prefetch aborts

dation at that time only. As for most VMs, the instruction working set is pretty small compared to the data set, this is likely to save some traffic (specially as the invalidation is broadcast). Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> Signed-off-by: Marc Zyngier <marc.

[PULL 16/28] arm: KVM: Add optimized PIPT icache flushing

y user of such a feature, let's implement some ad-hoc cache flushing in kvm_mmu.h. Should it become useful to other subsystems, it can be moved to a more global location. Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> Signed-o

[PULL 15/28] arm64: KVM: Add invalidate_icache_range helper

e from the linear mapping (and thus has none of the userspace fault handling complexity), and wire it in KVM instead of flush_icache_range. Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christ

[PULL 11/28] KVM: arm/arm64: Delete outdated forwarded irq documentation

umentation as the code has evolved, and people who need to understand these details are probably better off reading the code. Let's lighten our maintenance burden slightly and just get rid of this. Acked-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christof

[PULL 12/28] Revert "arm64: KVM: Hide PMU from guests when disabled"

a proper fix. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm64/kvm/sys_regs.c | 35 ++- 1 file changed, 14 insertions(+), 21 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 503144f13af0..1830eb

[PULL 09/28] KVM: arm/arm64: Provide a get_input_level for the arch timer

if the virtual interrupt is active, and otherwise we simply let the timer fire again and raise the virtual interrupt from the ISR. Reviewed-by: Eric Auger <eric.au...@redhat.com> Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.or

[PULL 05/28] KVM: arm/arm64: Don't cache the timer IRQ level

thie...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/arch_timer.c | 20 +--- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c index f9555b1e7f15..9376fe03bf2e 1

[PULL 08/28] KVM: arm/arm64: Support VGIC dist pend/active changes for mapped IRQs

t;eric.au...@redhat.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/vgic/vgic-mmio.c | 71 +++ virt/kvm/arm/vgic/vgic.c | 7 + virt/kvm/arm/vgic/vgic.h | 1 + 3 files changed, 73 insertions(+), 6 deleti

[PULL 06/28] KVM: arm/arm64: vgic: Support level-triggered mapped interrupts

with an injected timer interrupt. Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> Reviewed-by: Eric Auger <eric.au...@redhat.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/vgic/vgic-v2.c | 29 + virt/kvm/arm/v

[PULL 04/28] KVM: arm/arm64: Factor out functionality to get vgic mmio requester_vcpu

zywara <andre.przyw...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/vgic/vgic-mmio.c | 44 +++ 1 file changed, 28 insertions(+), 16 deletions(-) diff --git a/virt/kvm/arm/vgic/vgic-mmio.c b/virt/kvm/arm/vgic

[PULL 03/28] KVM: arm/arm64: Remove redundant preemptible checks

for other uses of per cpu variables either). Acked-by: Marc Zyngier <marc.zyng...@arm.com> Reviewed-by: Andre Przywara <andre.przyw...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/arm.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/vi

[PULL 02/28] KVM: arm: Use PTR_ERR_OR_ZERO()

novych <gomonov...@gmail.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/vgic/vgic-its.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c index 8e633bd9cc1e..465095355666 100

[PULL 01/28] arm64: KVM: Hide PMU from guests when disabled

enabled by KVM's userspace. Signed-off-by: Andrew Jones <drjo...@redhat.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm64/kvm/sys_regs.c | 35 +-- 1 file changed, 21 insertions(+), 14 deletions(-) diff --git a/arch/arm64/kvm

[PULL 00/28] KVM/ARM Changes for v4.16

optimization (2018-01-31 10:10:49 +0100) Thanks, -Christoffer Andrew Jones (1): arm64: KVM: Hide PMU from guests when disabled Christoffer Dall (15): KVM: arm/arm64: Remove redundant preemptible checks KVM: arm/arm64: Factor out functionality to get vgic mmio requester_vcpu KVM: arm/arm64

Re: [PATCH v9 7/9] KVM: arm/arm64: Provide a get_input_level for the arch timer

Hi Tomasz, On Mon, Jan 22, 2018 at 01:32:57PM +0100, Tomasz Nowicki wrote: > On 20.12.2017 12:36, Christoffer Dall wrote: > >The VGIC can now support the life-cycle of mapped level-triggered > >interrupts, and we no longer have to read back the timer state on every > >exit

[PATCH] KVM: arm/arm64: Fix arch timers with userspace irqchips

.de> Cc: <sta...@vger.kernel.org> # v4.12+ Fixes: d9e139778376 ("KVM: arm/arm64: Support arch timers with a userspace gic") Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- This conflicts horribly with everything when applied to either kvmarm/queue

[PATCH 2/3] KVM: arm/arm64: Fix userspace_irqchip_in_use counting

-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/arm.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c index 639dca0c0560..04ee7a327870 100644 --- a/virt/kvm/arm/arm.c +++ b/virt/kvm/arm/arm.c @@ -295,6

[PATCH 3/3] KVM: arm/arm64: Fixup userspace irqchip static key optimization

n in use. This fixes an issue when running in-kernel irqchip VMs alongside userspace irqchip VMs. Fixes: c44c232ee2d3 ("KVM: arm/arm64: Avoid work when userspace iqchips are not used") Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/arch_timer.c |

[PATCH 1/3] KVM: arm/arm64: Fix incorrect timer_is_pending logic

ate() in kvm_arch_timer_get_input_level(). Reported-by: Tomasz Nowicki <t...@semihalf.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/arch_timer.c | 36 +--- 1 file changed, 17 insertions(+), 19 deletions(-) diff -

[PATCH 0/3] Additional fixes for kvmarm/next

A bit last minute, we have three fixes for patches already queued in kvmarm/next related to the level-triggered mapped interrupts support. These patches apply on kvmarm/next and are pushed to kvmarm/queue. Thanks, -Christoffer Christoffer Dall (3): KVM: arm/arm64: Fix incorrect

Re: [PATCH v3 26/41] KVM: arm64: Introduce framework for accessing deferred sysregs

On Tue, Jan 23, 2018 at 04:04:40PM +, Dave Martin wrote: > On Fri, Jan 12, 2018 at 01:07:32PM +0100, Christoffer Dall wrote: > > We are about to defer saving and restoring some groups of system > > registers to vcpu_put and vcpu_load on supported systems. This means > &

Re: [PATCH v3 15/41] KVM: arm64: Remove kern_hyp_va() use in VHE switch function

On Wed, Jan 24, 2018 at 04:24:15PM +, Dave Martin wrote: > On Fri, Jan 12, 2018 at 01:07:21PM +0100, Christoffer Dall wrote: > > VHE kernels run completely in EL2 and therefore don't have a notion of > > kernel and hyp addresses, they are all just kernel addresses. Therefore

Re: [PATCH v3 09/41] KVM: arm64: Defer restoring host VFP state to vcpu_put

On Mon, Jan 22, 2018 at 05:33:28PM +, Dave Martin wrote: > On Fri, Jan 12, 2018 at 01:07:15PM +0100, Christoffer Dall wrote: > > Avoid saving the guest VFP registers and restoring the host VFP > > registers on every exit from the VM. Only when we're about to run > > users

Re: [PATCH v3 2/2] arm64: add micro test

value for now. > It should be trivial to add an additional patch in the end that lets the user override NTIMES, but again, just introduce it as a separate patch if it makes things easier. Thanks, -Christoffer > > On Wed, Jan 24, 2018 at 4:23 AM, Christoffer Dall > <christoffer.d...@lin

Re: [PATCH v3 14/41] KVM: arm64: Introduce VHE-specific kvm_vcpu_run

On Wed, Jan 24, 2018 at 04:13:26PM +, Dave Martin wrote: > On Fri, Jan 12, 2018 at 01:07:20PM +0100, Christoffer Dall wrote: > > So far this is just a copy of the legacy non-VHE switch function, but we > > will start reworking these functions in separate directions to work on

Re: [PATCH v3 2/2] arm64: add micro test

On Wed, Jan 24, 2018 at 09:30:28AM +0100, Andrew Jones wrote: > On Wed, Jan 24, 2018 at 09:17:55AM +0100, Christoffer Dall wrote: > > Hi Shih-Wei, > > > > On Fri, Jan 19, 2018 at 04:57:55PM -0500, Shih-Wei Li wrote: > > > Thanks for the feedback about the mi

Re: [PATCH v3 2/2] arm64: add micro test

Hi Shih-Wei, On Fri, Jan 19, 2018 at 04:57:55PM -0500, Shih-Wei Li wrote: > Thanks for the feedback about the mistakes in math and some issues in > naming, print msg, and coding style. I'll be careful and try to avoid > the same problems the next patch set. Sorry for all of the confusion. > > So

Re: [PATCH v6 11/13] KVM: arm64: Handle RAS SErrors from EL1 on guest exit

On Mon, Jan 22, 2018 at 06:18:54PM +, James Morse wrote: > Hi Christoffer, > > On 19/01/18 19:20, Christoffer Dall wrote: > > On Mon, Jan 15, 2018 at 07:39:04PM +, James Morse wrote: > >> We expect to have firmware-first handling of RAS SErrors, with errors &

Re: [PATCH] KVM: arm/arm64: Handle CPU_PM_ENTER_FAILED

eturn NOTIFY_OK; > + case CPU_PM_ENTER_FAILED: > case CPU_PM_EXIT: > if (__this_cpu_read(kvm_arm_hardware_enabled)) > /* The hardware was enabled before suspend. */ > -- > 2.15.1 > Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

Re: [PATCH v9 7/9] KVM: arm/arm64: Provide a get_input_level for the arch timer

Hi Tomasz, On Mon, Jan 22, 2018 at 01:32:57PM +0100, Tomasz Nowicki wrote: > Please see my observations/comments below. > > On 20.12.2017 12:36, Christoffer Dall wrote: > >The VGIC can now support the life-cycle of mapped level-triggered > >interrupts, and we no lon

Re: [PATCH v6 12/13] KVM: arm64: Handle RAS SErrors from EL2 on guest exit

On Mon, Jan 15, 2018 at 07:39:05PM +, James Morse wrote: > We expect to have firmware-first handling of RAS SErrors, with errors > notified via an APEI method. For systems without firmware-first, add > some minimal handling to KVM. > > There are two ways KVM can take an SError due to a guest,

Re: [PATCH v6 11/13] KVM: arm64: Handle RAS SErrors from EL1 on guest exit

On Mon, Jan 15, 2018 at 07:39:04PM +, James Morse wrote: > We expect to have firmware-first handling of RAS SErrors, with errors > notified via an APEI method. For systems without firmware-first, add > some minimal handling to KVM. > > There are two ways KVM can take an SError due to a guest,

Re: [PATCH v4 17/19] arm64: KVM: Dynamically compute the HYP VA mask

0) --- and now I'm not sure which one I prefer. > + va_mask |= region; > } > > static u32 compute_instruction(int n, u32 rd, u32 rn) > -- > 2.14.2 > Otherwise looks good: Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

Re: [PATCH v4 18/19] arm64: KVM: Introduce EL2 VA randomisation

On Thu, Jan 04, 2018 at 06:43:33PM +, Marc Zyngier wrote: > The main idea behind randomising the EL2 VA is that we usually have > a few spare bits between the most significant bit of the VA mask > and the most significant bit of the linear mapping. > > Those bits could be a bunch of zeroes,

Re: [PATCH v4 19/19] arm64: Update the KVM memory map documentation

On Thu, Jan 04, 2018 at 06:43:34PM +, Marc Zyngier wrote: > Update the documentation to reflect the new tricks we play on the > EL2 mappings... > > Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> Acked-by: Christoffer Dall <christoffer.d...@linaro.org> >

Re: [PATCH v4 15/19] arm64; insn: Add encoder for the EXTR instruction

> + pr_err("%s: unknown variant encoding %d\n", __func__, variant); > + return AARCH64_BREAK_FAULT; > + } > + > + insn = aarch64_insn_encode_immediate(AARCH64_INSN_IMM_S, insn, lsb); > + insn = aarch64_insn_encode_register(AARCH64_

Re: [PATCH v4 16/19] arm64: insn: Allow ADD/SUB (immediate) with LSL #12

SN_IMM_12, insn, imm); > + > +out: > + pr_err("%s: invalid immediate encoding %d\n", __func__, imm); > + return AARCH64_BREAK_FAULT; > } > > u32 aarch64_insn_gen_bitfield(enum aarch64_insn_register dst, Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

Re: [PATCH v4 13/19] KVM: arm/arm64: Keep GICv2 HYP VAs in kvm_vgic_global_state

83,14 @@ int vgic_v2_probe(const struct gic_kvm_info *info) > void vgic_v2_load(struct kvm_vcpu *vcpu) > { > struct vgic_v2_cpu_if *cpu_if = >arch.vgic_cpu.vgic_v2; > - struct vgic_dist *vgic = >kvm->arch.vgic; > > - writel_relaxed(cpu_if->vgic_vmcr, vgic->vctrl_base + GICH_VMCR); > + writel_relaxed(cpu_if->vgic_vmcr, > +kvm_vgic_global_state.vctrl_base + GICH_VMCR); > } > > void vgic_v2_put(struct kvm_vcpu *vcpu) > { > struct vgic_v2_cpu_if *cpu_if = >arch.vgic_cpu.vgic_v2; > - struct vgic_dist *vgic = >kvm->arch.vgic; > > - cpu_if->vgic_vmcr = readl_relaxed(vgic->vctrl_base + GICH_VMCR); > + cpu_if->vgic_vmcr = readl_relaxed(kvm_vgic_global_state.vctrl_base + > GICH_VMCR); > } > -- > 2.14.2 > Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

Re: [PATCH v4 14/19] KVM: arm/arm64: Move HYP IO VAs to the "idmap" range

On Thu, Jan 04, 2018 at 06:43:29PM +, Marc Zyngier wrote: > We so far mapped our HYP IO (which is essencially the GICv2 control > registers) using the same method as for memory. It recently appeared > that is a bit unsafe: > > We compute the HYP VA using the kern_hyp_va helper, but that

Re: [PATCH v3 00/41] Optimize KVM/ARM for VHE systems

On Thu, Jan 18, 2018 at 03:18:21PM +0300, Yury Norov wrote: > On Thu, Jan 18, 2018 at 12:16:32PM +0100, Christoffer Dall wrote: > > Hi Yury, > > > > [cc'ing Alex Bennee who had some thoughts on this] > > > > On Mon, Jan 15, 2018 at 05:14:23PM +0300, Yury Norov

Re: [PATCH v3 30/41] KVM: arm64: Prepare to handle deferred save/restore of 32-bit registers

On Wed, Jan 17, 2018 at 06:22:29PM +, Julien Thierry wrote: > Hi, > > On 12/01/18 12:07, Christoffer Dall wrote: > >32-bit registers are not used by a 64-bit host kernel and can be > >deferred, but we need to rework the accesses to this register to access > >

Re: [PATCH v3 26/41] KVM: arm64: Introduce framework for accessing deferred sysregs

On Wed, Jan 17, 2018 at 05:52:21PM +, Julien Thierry wrote: > > > On 12/01/18 12:07, Christoffer Dall wrote: > >We are about to defer saving and restoring some groups of system > >registers to vcpu_put and vcpu_load on supported systems. This means > >that

Re: [PATCH v3 08/41] KVM: arm/arm64: Introduce vcpu_el1_is_32bit

On Wed, Jan 17, 2018 at 02:44:32PM +, Julien Thierry wrote: > Hi Christoffer, > > On 12/01/18 12:07, Christoffer Dall wrote: > >We have numerous checks around that checks if the HCR_EL2 has the RW bit > >set to figure out if we're running an AArch64 or AArch32 VM. In so

Re: [PATCH v3 00/41] Optimize KVM/ARM for VHE systems

Hi Yury, [cc'ing Alex Bennee who had some thoughts on this] On Mon, Jan 15, 2018 at 05:14:23PM +0300, Yury Norov wrote: > On Fri, Jan 12, 2018 at 01:07:06PM +0100, Christoffer Dall wrote: > > This series redesigns parts of KVM/ARM to optimize the performance on > > VHE system

[PATCH] arm64: mm: Add additional parameter to uaccess_ttbr0_disable

conflict with commit 6b88a32c7af68895134872cdec3b6bfdb532d94e ("arm64: kpti: Fix the interaction between ASID switching and software PAN"). Cc: Will Deacon <will.dea...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Marc Zyngier <marc.zyng...@arm.com> Sig

Re: [PATCH v3 00/41] Optimize KVM/ARM for VHE systems

On Wed, Jan 17, 2018 at 11:34:54AM +0300, Yury Norov wrote: > On Mon, Jan 15, 2018 at 04:50:36PM +0100, Christoffer Dall wrote: > > Hi Yury, > > > > On Mon, Jan 15, 2018 at 05:14:23PM +0300, Yury Norov wrote: > > > On Fri, Jan 12, 2018 at 01:07:06PM

[PULL v2 3/3] arm64: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls

nstead, let's follow the SMCCC which states that -1 must be returned to the caller when getting an unknown function number. Cc: <sta...@vger.kernel.org> Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm

[PULL v2 2/3] KVM: arm64: Fix GICv4 init when called from vgic_its_create

t;eric.au...@redhat.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/vgic/vgic-init.c | 8 +--- virt/kvm/arm/vgic/vgic-v4.c | 2 +- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/virt/kvm/arm/vgic/vgic-init.c b/virt/kvm/arm/vgi

[PULL v2 0/3] KVM/ARM Fixes for v4.15 - Round 3

-arm-fixes-for-v4.15-3-v2 for you to fetch changes up to acfb3b883f6d6a4b5d27ad7fdded11f6a09ae6dd: arm64: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls (2018-01-16 17:58:51 +0100) Christoffer Dall (1): KVM: arm64: Fix GICv4 init when called from vgic_its_create Marc Zyngier (1

[PULL v2 1/3] KVM: arm/arm64: Check pagesize when allocating a hugepage at Stage 2

ed-off-by: Punit Agrawal <punit.agra...@arm.com> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: <sta...@vger.kernel.org> # v4.5+ Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/mmu.c | 2

Re: [PATCH] arm64: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls

nd the undef is counter productive. > > Instead, let's follow the SMCCC which states that -1 must be returned > to the caller when getting an unknown function number. > > Cc: sta...@vger.kernel.org > Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> Reviewed-by: Christoff

Re: [PATCH v4 11/19] KVM: arm/arm64: Demote HYP VA range display to being a debug feature

ed-off-by: Marc Zyngier <marc.zyng...@arm.com> Acked-by: Christoffer Dall <christoffer.d...@linaro.org> > --- > virt/kvm/arm/mmu.c | 7 --- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c > index b4b69

Re: [PATCH v3 00/41] Optimize KVM/ARM for VHE systems

Hi Yury, On Mon, Jan 15, 2018 at 05:14:23PM +0300, Yury Norov wrote: > On Fri, Jan 12, 2018 at 01:07:06PM +0100, Christoffer Dall wrote: > > This series redesigns parts of KVM/ARM to optimize the performance on > > VHE systems. The general approach is to try to do as little work

Re: [PATCH v4 10/19] KVM: arm/arm64: Do not use kern_hyp_va() with kvm_vgic_global_state

On Thu, Jan 04, 2018 at 06:43:25PM +, Marc Zyngier wrote: > kvm_vgic_global_state is part of the read-only section, and is > usually accessed using a PC-relative address generation (adrp + add). > > It is thus useless to use kern_hyp_va() on it, and actively problematic > if kern_hyp_va()

Re: [PATCH v4 09/19] arm64: cpufeatures: Drop the ARM64_HYP_OFFSET_LOW feature flag

t depends on it. Otherwise: Acked-by: Christoffer Dall <christoffer.d...@linaro.org> > > Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> > --- > arch/arm64/include/asm/cpucaps.h | 2 +- > arch/arm64/kernel/cpufeature.c | 19 --- > 2 files changed, 1 insert

Re: [PATCH v4 08/19] arm64: KVM: Dynamically patch the kernel/hyp VA mask

On Thu, Jan 04, 2018 at 06:43:23PM +, Marc Zyngier wrote: > So far, we're using a complicated sequence of alternatives to > patch the kernel/hyp VA mask on non-VHE, and NOP out the > masking altogether when on VHE. > > THe newly introduced dynamic patching gives us the opportunity nit:

Re: [PATCH v4 06/19] arm64: insn: Add N immediate encoding

On Thu, Jan 04, 2018 at 06:43:21PM +, Marc Zyngier wrote: > We're missing the a way to generate the encoding of the N immediate, > which is only a single bit used in a number of instruction that take > an immediate. > > Signed-off-by: Marc Zyngier <marc.zyng...@arm.com>

Re: [PATCH v4 07/19] arm64: insn: Add encoder for bitwise operations using literals

ance over the parts I could vaguely understand and didn't see any issues. I suppose that's a weak sort of: Acked-by: Christoffer Dall <christoffer.d...@linaro.org> > > Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> > --- > arch/arm64/include/asm/insn.h |

Re: [PATCH v4 05/19] arm64: alternatives: Add dynamic patching feature

continue; > > - BUG_ON(alt->alt_len != alt->orig_len); > + if (alt->cpufeature == ARM64_NCAPS) > + BUG_ON(alt->alt_len != 0); > + else > + BUG_ON(alt->alt_len != alt->ori

Re: [PATCH v4 03/19] arm64: asm-offsets: Remove potential circular dependency

On Mon, Jan 15, 2018 at 9:42 AM, Marc Zyngier <marc.zyng...@arm.com> wrote: > On 15/01/18 08:34, Christoffer Dall wrote: >> On Thu, Jan 04, 2018 at 06:43:18PM +, Marc Zyngier wrote: >>> So far, we've been lucky enough that none of the include files >>> that a

Re: [PATCH v4 04/19] arm64: alternatives: Enforce alignment of struct alt_instr

@ -151,5 +152,8 @@ int main(void) >DEFINE(HIBERN_PBE_ADDR,offsetof(struct pbe, address)); >DEFINE(HIBERN_PBE_NEXT,offsetof(struct pbe, next)); >DEFINE(ARM64_FTR_SYSVAL, offsetof(struct arm64_ftr_reg, sys_val)); > + BLANK(); > + DEFINE(ALTINSTR_ALIGN, (63 - __builtin_clzl(__alignof__(struct > alt_instr; > + >return 0; > } > -- > 2.14.2 > ... the rest looks correct to me. FWIW: Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

Re: [PATCH v4 03/19] arm64: asm-offsets: Remove potential circular dependency

On Thu, Jan 04, 2018 at 06:43:18PM +, Marc Zyngier wrote: > So far, we've been lucky enough that none of the include files > that asm-offsets.c requires include asm-offsets.h. This is > about to change, and would introduce a nasty circular dependency... > > Let's now guard the inclusion of

Re: [PATCH v8 7/7] arm64: kvm: handle SError Interrupt by categorization

On Fri, Jan 12, 2018 at 06:05:23PM +, James Morse wrote: > On 15/12/17 03:30, gengdongjiu wrote: > > On 2017/12/7 14:37, gengdongjiu wrote: [...] > > (I recall someone saying migration is needed for any new KVM/cpu features, > but I > can't find the thread) > I don't know of any hard

[PULL 2/2] KVM: arm64: Fix GICv4 init when called from vgic_its_create

t;eric.au...@redhat.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/vgic/vgic-init.c | 8 +--- virt/kvm/arm/vgic/vgic-v4.c | 2 +- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/virt/kvm/arm/vgic/vgic-init.c b/virt/kvm/arm/vgi

[PULL 1/2] KVM: arm/arm64: Check pagesize when allocating a hugepage at Stage 2

ed-off-by: Punit Agrawal <punit.agra...@arm.com> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: <sta...@vger.kernel.org> # v4.5+ Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- virt/kvm/arm/mmu.c | 2

[PATCH v3 38/41] KVM: arm/arm64: Move arm64-only vgic-v2-sr.c file to arm64

, and remove the ifdef in the C file. Reviewed-by: Andre Przywara <andre.przyw...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm/kvm/hyp/Makefile | 1 - arch/arm64/kvm/hyp/Makefile | 2 +- {virt/kvm/arm => arch

[PATCH v3 24/41] KVM: arm64: Change 32-bit handling of VM system registers

easier when we have to start accessing system registers that use deferred save/restore and might have to be read directly from the physical CPU. Reviewed-by: Andrew Jones <drjo...@redhat.com> Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall &l

[PATCH v3 22/41] KVM: arm64: Unify non-VHE host/guest sysreg save and restore functions

the other into simply save/restore. Reviewed-by: Andrew Jones <drjo...@redhat.com> Reviewed-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm64/include/asm/kvm_hyp.h | 6 ++ arch/arm64/kvm/hyp/switch.c | 10

[PATCH v3 29/41] KVM: arm64: Defer saving/restoring 64-bit sysregs to vcpu load/put on VHE

be deferred but we do this in a separate patch as it requires a bit more infrastructure. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm64/kvm/hyp/sysreg-sr.c | 37 + arch/arm64/kvm/sys_regs.c

[PATCH v3 17/41] KVM: arm64: Remove noop calls to timer save/restore from VHE switch

Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm64/kvm/hyp/switch.c | 2 -- virt/kvm/arm/hyp/timer-sr.c | 44 ++-- 2 files changed, 22 insertions(+), 24 deletions(-) diff --git a/arch/a

[PATCH v3 26/41] KVM: arm64: Introduce framework for accessing deferred sysregs

ew in the subsequent patches where it is clear which registers become deferred. [ Most of this logic was contributed by Marc Zyngier ] Signed-off-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm64/include/asm/kvm

[PATCH v3 41/41] KVM: arm/arm64: Avoid VGICv3 save/restore on VHE with no IRQs

when running in the host), and doing the configuration on every round-trip on non-VHE systems. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm/include/asm/kvm_hyp.h | 2 + arch/arm/kvm/hyp/switch.c| 8 ++- arch/arm64/include/asm/kvm_hyp.h | 2 + arch

[PATCH v3 39/41] KVM: arm/arm64: Handle VGICv3 save/restore from the main VGIC code on VHE

though we have never actually run the guest with the newly written GIC state. We solve this by inserting an ISB in the early exit path. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm64/kvm/hyp/switch.c | 3 --- virt/kvm/arm/arm.c | 1 + virt/kvm/arm/vgic/

[PATCH v3 40/41] KVM: arm/arm64: Move VGIC APR save/restore to vgic put/load

for migration. To make sure this works, factor out the APR save/restore functionality into separate functions called from the VCPU (and by extension VGIC) put/load hooks. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm/include/asm/kvm_hyp.h | 2 + arch/arm64/i

[PATCH v3 11/41] KVM: arm64: Slightly improve debug save/restore functions

com> Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm64/kvm/hyp/debug-sr.c | 26 -- 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/arch/arm64/kvm/hyp/debug-sr.c b/arch/arm64/kvm/hyp/debug-sr.c index 406829b6a43e..81b8ad4

[PATCH v3 31/41] KVM: arm64: Defer saving/restoring 32-bit sysregs to vcpu load/put

flag on VHE, but since we do the load/put pretty rarely, this comes out as a win anyway. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm64/kvm/hyp/switch.c| 6 -- arch/arm64/kvm/hyp/sysreg-sr.c | 12 ++-- 2 files changed, 10 insertions(+), 8 del

[PATCH v3 35/41] KVM: arm64: Separate activate_traps and deactive_traps for VHE and non-VHE

To make the code more readable and to avoid the overhead of a function call, let's get rid of a pair of the alternative function selectors and explicitly call the VHE and non-VHE functions instead, telling the compiler to try to inline the static function if it can. Signed-off-by: Christoffer

[PATCH v3 34/41] KVM: arm64: Configure c15, PMU, and debug register traps on cpu load/put for VHE

executing KVM kernel code and KVM doesn't use floating point itself. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm64/kvm/hyp/switch.c | 37 +++-- 1 file changed, 27 insertions(+), 10 deletions(-) diff --git a/arch/arm64/kvm/hyp/sw

[PATCH v3 07/41] KVM: arm/arm64: Add kvm_vcpu_load_sysregs and kvm_vcpu_put_sysregs

As we are about to move a bunch of save/restore logic for VHE kernels to the load and put functions, we need some infrastructure to do this. Reviewed-by: Andrew Jones <drjo...@redhat.com> Acked-by: Marc Zyngier <marc.zyng...@arm.com> Signed-off-by: Christoffer Dall <christoffer.

[PATCH v3 33/41] KVM: arm64: Configure FPSIMD traps on vcpu load/put

these during vcpu load/put. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- arch/arm64/include/asm/kvm_hyp.h | 6 + arch/arm64/kvm/hyp/switch.c | 51 +--- arch/arm64/kvm/hyp/sysreg-sr.c | 12 -- 3 files changed, 53 inse

[PATCH v3 36/41] KVM: arm/arm64: Get rid of vgic_elrsr

of the endianness conversion in the VGIC save function, which is completely unnecessary and would actually result in incorrect functionality on big-endian systems, because we are only using typed values here and not converting pointers and reading different types here. Signed-off-by: Christoffer Dall

[PATCH v3 37/41] KVM: arm/arm64: Handle VGICv2 save/restore from the main VGIC code

We can program the GICv2 hypervisor control interface logic directly from the core vgic code and can instead do the save/restore directly from the flush/sync functions, which can lead to a number of future optimizations. Signed-off-by: Christoffer Dall <christoffer.d...@linaro.org> --- ar

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