On Thu, Jan 18, 2018 at 03:18:21PM +0300, Yury Norov wrote:
> On Thu, Jan 18, 2018 at 12:16:32PM +0100, Christoffer Dall wrote:
> > Hi Yury,
> >
> > [cc'ing Alex Bennee who had some thoughts on this]
> >
> > On Mon, Jan 15, 2018 at 05:14:23PM +0300, Yury N
On Wed, Jan 17, 2018 at 06:22:29PM +, Julien Thierry wrote:
> Hi,
>
> On 12/01/18 12:07, Christoffer Dall wrote:
> >32-bit registers are not used by a 64-bit host kernel and can be
> >deferred, but we need to rework the accesses to this register to access
> >th
On Wed, Jan 17, 2018 at 05:52:21PM +, Julien Thierry wrote:
>
>
> On 12/01/18 12:07, Christoffer Dall wrote:
> >We are about to defer saving and restoring some groups of system
> >registers to vcpu_put and vcpu_load on supported systems. This means
> >that we
On Wed, Jan 17, 2018 at 02:44:32PM +, Julien Thierry wrote:
> Hi Christoffer,
>
> On 12/01/18 12:07, Christoffer Dall wrote:
> >We have numerous checks around that checks if the HCR_EL2 has the RW bit
> >set to figure out if we're running an AArch64 or AArch32 VM.
Hi Yury,
[cc'ing Alex Bennee who had some thoughts on this]
On Mon, Jan 15, 2018 at 05:14:23PM +0300, Yury Norov wrote:
> On Fri, Jan 12, 2018 at 01:07:06PM +0100, Christoffer Dall wrote:
> > This series redesigns parts of KVM/ARM to optimize the performance on
> > VHE s
gable conflict with commit
6b88a32c7af68895134872cdec3b6bfdb532d94e
("arm64: kpti: Fix the interaction between ASID switching and software PAN").
Cc: Will Deacon
Cc: Catalin Marinas
Cc: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/asm-uaccess.h | 8
On Wed, Jan 17, 2018 at 11:34:54AM +0300, Yury Norov wrote:
> On Mon, Jan 15, 2018 at 04:50:36PM +0100, Christoffer Dall wrote:
> > Hi Yury,
> >
> > On Mon, Jan 15, 2018 at 05:14:23PM +0300, Yury Norov wrote:
> > > On Fri, Jan 12, 2018 at 01:07:06PM +0100, Christ
the SMCCC which states that -1 must be returned
to the caller when getting an unknown function number.
Cc:
Signed-off-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/handle_exit.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kvm/handl
Eric Auger
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/vgic/vgic-init.c | 8 +---
virt/kvm/arm/vgic/vgic-v4.c | 2 +-
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/virt/kvm/arm/vgic/vgic-init.c b/virt/kvm/arm/vgic/vgic-init.c
index 62310122ee78..743ca5cb05ef 100644
--- a/virt
-arm-fixes-for-v4.15-3-v2
for you to fetch changes up to acfb3b883f6d6a4b5d27ad7fdded11f6a09ae6dd:
arm64: KVM: Fix SMCCC handling of unimplemented SMC/HVC calls (2018-01-16
17:58:51 +0100)
Christoffer Dall (1):
KVM: arm64: Fix GICv4 init when called from vgic_its_create
Marc Zyngier (1
c: Marc Zyngier
Cc: # v4.5+
Reviewed-by: Christoffer Dall
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/mmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c
index b4b69c2d1012..9dea96380339 100644
--- a/virt/kvm/arm/mmu.c
+++ b/vir
and the undef is counter productive.
>
> Instead, let's follow the SMCCC which states that -1 must be returned
> to the caller when getting an unknown function number.
>
> Cc: sta...@vger.kernel.org
> Signed-off-by: Marc Zyngier
Reviewed-by: Christoffer Dall
And applied
- ret = create_hyp_io_mappings(kvm_vgic_global_state.vctrl_base,
> - kvm_vgic_global_state.vctrl_base +
> - resource_size(&info->vctrl),
> - info->vctrl.start);
> - if (ret) {
> - kvm_err("Cannot map VCTRL into hyp\n");
> - goto out;
> - }
> -
> ret = kvm_register_vgic_device(KVM_DEV_TYPE_ARM_VGIC_V2);
> if (ret) {
> kvm_err("Cannot register GICv2 KVM device\n");
> --
> 2.14.2
>
Otherwise looks good:
Reviewed-by: Christoffer Dall
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ed-off-by: Marc Zyngier
Acked-by: Christoffer Dall
> ---
> virt/kvm/arm/mmu.c | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c
> index b4b69c2d1012..84d09f1a44d4 100644
> --- a/virt/kvm/arm/mmu.c
>
Hi Yury,
On Mon, Jan 15, 2018 at 05:14:23PM +0300, Yury Norov wrote:
> On Fri, Jan 12, 2018 at 01:07:06PM +0100, Christoffer Dall wrote:
> > This series redesigns parts of KVM/ARM to optimize the performance on
> > VHE systems. The general approach is to try to do as little work
On Thu, Jan 04, 2018 at 06:43:25PM +, Marc Zyngier wrote:
> kvm_vgic_global_state is part of the read-only section, and is
> usually accessed using a PC-relative address generation (adrp + add).
>
> It is thus useless to use kern_hyp_va() on it, and actively problematic
> if kern_hyp_va() beco
depends on it.
Otherwise:
Acked-by: Christoffer Dall
>
> Signed-off-by: Marc Zyngier
> ---
> arch/arm64/include/asm/cpucaps.h | 2 +-
> arch/arm64/kernel/cpufeature.c | 19 ---
> 2 files changed, 1 insertion(+), 20 deletions(-)
>
> diff --git a/arch/arm64
On Thu, Jan 04, 2018 at 06:43:23PM +, Marc Zyngier wrote:
> So far, we're using a complicated sequence of alternatives to
> patch the kernel/hyp VA mask on non-VHE, and NOP out the
> masking altogether when on VHE.
>
> THe newly introduced dynamic patching gives us the opportunity
nit: s/THe/
On Thu, Jan 04, 2018 at 06:43:21PM +, Marc Zyngier wrote:
> We're missing the a way to generate the encoding of the N immediate,
> which is only a single bit used in a number of instruction that take
> an immediate.
>
> Signed-off-by: Marc Zyngier
Acked-by: Christoffer
t I did glance over the parts
I could vaguely understand and didn't see any issues.
I suppose that's a weak sort of:
Acked-by: Christoffer Dall
>
> Signed-off-by: Marc Zyngier
> ---
> arch/arm64/include/asm/insn.h | 9 +++
> arch/arm64/kernel/insn.c | 136
> ++
p(alt->cpufeature))
> continue;
>
> - BUG_ON(alt->alt_len != alt->orig_len);
> + if (alt->cpufeature == ARM64_NCAPS)
> + BUG_ON(alt->alt_len != 0);
> + else
> +
On Mon, Jan 15, 2018 at 9:42 AM, Marc Zyngier wrote:
> On 15/01/18 08:34, Christoffer Dall wrote:
>> On Thu, Jan 04, 2018 at 06:43:18PM +, Marc Zyngier wrote:
>>> So far, we've been lucky enough that none of the include files
>>> that asm-offsets.c require
+152,8 @@ int main(void)
>DEFINE(HIBERN_PBE_ADDR, offsetof(struct pbe, address));
>DEFINE(HIBERN_PBE_NEXT,offsetof(struct pbe, next));
>DEFINE(ARM64_FTR_SYSVAL, offsetof(struct arm64_ftr_reg, sys_val));
> + BLANK();
> + DEFINE(ALTINSTR_ALIGN, (63 - __builtin_clzl(__alignof__(struct
> alt_instr;
> +
>return 0;
> }
> --
> 2.14.2
>
... the rest looks correct to me. FWIW:
Reviewed-by: Christoffer Dall
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On Thu, Jan 04, 2018 at 06:43:18PM +, Marc Zyngier wrote:
> So far, we've been lucky enough that none of the include files
> that asm-offsets.c requires include asm-offsets.h. This is
> about to change, and would introduce a nasty circular dependency...
>
> Let's now guard the inclusion of asm
On Fri, Jan 12, 2018 at 06:05:23PM +, James Morse wrote:
> On 15/12/17 03:30, gengdongjiu wrote:
> > On 2017/12/7 14:37, gengdongjiu wrote:
[...]
>
> (I recall someone saying migration is needed for any new KVM/cpu features,
> but I
> can't find the thread)
>
I don't know of any hard set-
Eric Auger
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/vgic/vgic-init.c | 8 +---
virt/kvm/arm/vgic/vgic-v4.c | 2 +-
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/virt/kvm/arm/vgic/vgic-init.c b/virt/kvm/arm/vgic/vgic-init.c
index 62310122ee78..743ca5cb05ef 100644
--- a/virt
c: Marc Zyngier
Cc: # v4.5+
Reviewed-by: Christoffer Dall
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/mmu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/virt/kvm/arm/mmu.c b/virt/kvm/arm/mmu.c
index b4b69c2d1012..9dea96380339 100644
--- a/virt/kvm/arm/mmu.c
+++ b/vir
f8f85dc00b7427de6222ea3955c52512315d13cd:
KVM: arm64: Fix GICv4 init when called from vgic_its_create (2018-01-12
11:40:21 +0100)
Thanks,
-Christoffer
Christoffer Dall (1):
KVM: arm64: Fix GICv4 init when called from vgic_its_create
Punit Agrawal (1):
KVM: arm/arm64: Check pagesize when allocating a hugepage
remove the ifdef in the C file.
Reviewed-by: Andre Przywara
Signed-off-by: Christoffer Dall
---
arch/arm/kvm/hyp/Makefile | 1 -
arch/arm64/kvm/hyp/Makefile | 2 +-
{virt/kvm/arm => arch/arm64/kvm}/hyp/vgic-v2-sr.c | 2 --
3 files changed, 1 insert
easier when we have to start
accessing system registers that use deferred save/restore and might
have to be read directly from the physical CPU.
Reviewed-by: Andrew Jones
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_host.h | 8
arch/arm64
e the other into simply save/restore.
Reviewed-by: Andrew Jones
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_hyp.h | 6 ++
arch/arm64/kvm/hyp/switch.c | 10 +-
arch/arm64/kvm/hyp/sysreg-sr.c | 18 ++
3 files chang
sysregs can also be deferred but we do this in a separate
patch as it requires a bit more infrastructure.
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/sysreg-sr.c | 37 +
arch/arm64/kvm/sys_regs.c | 40
Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/switch.c | 2 --
virt/kvm/arm/hyp/timer-sr.c | 44 ++--
2 files changed, 22 insertions(+), 24 deletions(-)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
review in
the subsequent patches where it is clear which registers become
deferred.
[ Most of this logic was contributed by Marc Zyngier ]
Signed-off-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_host.h | 8 +-
arch/arm64/kvm
when running in the host), and doing the
configuration on every round-trip on non-VHE systems.
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_hyp.h | 2 +
arch/arm/kvm/hyp/switch.c| 8 ++-
arch/arm64/include/asm/kvm_hyp.h | 2 +
arch/arm64/kvm/hyp/switch.c | 8
though we have never
actually run the guest with the newly written GIC state. We solve this
by inserting an ISB in the early exit path.
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/switch.c | 3 ---
virt/kvm/arm/arm.c | 1 +
virt/kvm/arm/vgic/vgic.c| 5 +
3 files changed
for migration. To make sure
this works, factor out the APR save/restore functionality into separate
functions called from the VCPU (and by extension VGIC) put/load hooks.
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_hyp.h | 2 +
arch/arm64/include/asm/kvm_hyp.h | 2 +
virt
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/debug-sr.c | 26 --
1 file changed, 12 insertions(+), 14 deletions(-)
diff --git a/arch/arm64/kvm/hyp/debug-sr.c b/arch/arm64/kvm/hyp/debug-sr.c
index 406829b6a43e..81b8ad44f9e0 100644
--- a/arch/arm64/kvm/hyp/debug-sr.c
+
flag on VHE, but since we do the
load/put pretty rarely, this comes out as a win anyway.
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/switch.c| 6 --
arch/arm64/kvm/hyp/sysreg-sr.c | 12 ++--
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/arch/arm64
To make the code more readable and to avoid the overhead of a function
call, let's get rid of a pair of the alternative function selectors and
explicitly call the VHE and non-VHE functions instead, telling the
compiler to try to inline the static function if it can.
Signed-off-by: Christ
while executing KVM kernel code and KVM doesn't use
floating point itself.
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/switch.c | 37 +++--
1 file changed, 27 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm
As we are about to move a bunch of save/restore logic for VHE kernels to
the load and put functions, we need some infrastructure to do this.
Reviewed-by: Andrew Jones
Acked-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_host.h | 3 +++
arch/arm64/include/asm
these during vcpu load/put.
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_hyp.h | 6 +
arch/arm64/kvm/hyp/switch.c | 51 +---
arch/arm64/kvm/hyp/sysreg-sr.c | 12 --
3 files changed, 53 insertions(+), 16 deletions(-)
diff --git
the endianness conversion in the VGIC save
function, which is completely unnecessary and would actually result in
incorrect functionality on big-endian systems, because we are only using
typed values here and not converting pointers and reading different
types here.
Signed-off-by: Christoffer Dall
We can program the GICv2 hypervisor control interface logic directly
from the core vgic code and can instead do the save/restore directly
from the flush/sync functions, which can lead to a number of future
optimizations.
Signed-off-by: Christoffer Dall
---
arch/arm/kvm/hyp/switch.c| 4
The comment only applied to SPE on non-VHE systems, so we simply remove
it.
Suggested-by: Andrew Jones
Acked-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/switch.c | 4
1 file changed, 4 deletions(-)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp
32-bit VMs is a
bit clunky, but this will be improved in following patches which will
first prepare and subsequently implement deferred save/restore of the
32-bit registers, including the 32-bit SPSRs.
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_emulate.h | 12 ++-
arch
ELR_EL1 is not used by a VHE host kernel and can be deferred, but we
need to rework the accesses to this register to access the latest value
depending on whether or not guest system registers are loaded on the CPU
or only reside in memory.
Signed-off-by: Christoffer Dall
---
arch/arm64/include
Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/switch.c | 68 ++---
1 file changed, 39 insertions(+), 29 deletions(-)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index 05f266b505ce..c01bcfc3fb52 100644
--- a/arch
e the function saving/restoring the
remaining system register to make it clear this function deals with
the EL1 system registers.
No functional change.
Reviewed-by: Andrew Jones
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/sysreg-sr.c | 46 +++---
1
VHE and non-VHE functionality now that we have
separate functions.
Reviewed-by: Andrew Jones
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_hyp.h | 12
arch/arm64/kvm/hyp/switch.c | 20 ++--
arch/arm64/kvm/hyp/sysreg
32-bit registers are not used by a 64-bit host kernel and can be
deferred, but we need to rework the accesses to this register to access
the latest value depending on whether or not guest system registers are
loaded on the CPU or only reside in memory.
Signed-off-by: Christoffer Dall
---
arch
-by: Christoffer Dall
---
arch/arm64/kvm/hyp/sysreg-sr.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/kvm/hyp/sysreg-sr.c b/arch/arm64/kvm/hyp/sysreg-sr.c
index baa243a010b3..1f2d5e9343b0 100644
--- a/arch/arm64/kvm/hyp/sysreg-sr.c
+++ b/arch/arm64/kvm/hyp/sysreg
From: Christoffer Dall
Currently we access the system registers array via the vcpu_sys_reg()
macro. However, we are about to change the behavior to some times
modify the register file directly, so let's change this to two
primitives:
* Accessor macros vcpu_write_sys_reg(
As we are about to move calls around in the sysreg save/restore logic,
let's first rewrite the alternative function callers, because it is
going to make the next patches much easier to read.
Acked-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/sysreg-sr.c
There is no need to reset the VTTBR to zero when exiting the guest on
VHE systems. VHE systems don't use stage 2 translations for the EL2&0
translation regime used by the host.
Reviewed-by: Andrew Jones
Acked-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp
VHE kernels run completely in EL2 and therefore don't have a notion of
kernel and hyp addresses, they are all just kernel addresses. Therefore
don't call kern_hyp_va() in the VHE switch function.
Reviewed-by: Andrew Jones
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
switch
functions.
No functional change.
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/switch.c | 99 -
1 file changed, 54 insertions(+), 45 deletions(-)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp
nd
for the following patches that optimize KVM on AArch64 hosts with VHE.
Therefore, introduce a helper, vcpu_el1_is_32bit, and replace existing
direct checks of HCR_EL2.RW with the helper.
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_emulate.h | 7 ++-
arch/arm64/kvm/hy
So far this is just a copy of the legacy non-VHE switch function, but we
will start reworking these functions in separate directions to work on
VHE and non-VHE in the most optimal way in later patches.
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_asm.h
There is no need to figure out inside the world-switch if we should
save/restore the debug registers or not, we can might as well do that in
the higher level debug setup code, making it easier to optimize down the
line.
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64
odify the bits in the vcpu->arch.hcr[_el2] directly when
needed.
Acked-by: Marc Zyngier
Reviewed-by: Andrew Jones
Reviewed-by: Julien Thierry
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_emulate.h | 9 ++---
arch/arm/include/asm/kvm_host.h | 3 ---
arch/arm/kvm/e
Moving the call to vcpu_load() in kvm_arch_vcpu_ioctl_run() to after
we've called kvm_vcpu_first_run_init() simplifies some of the vgic and
there is also no need to do vcpu_load() for things such as handling the
immediate_exit flag.
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/arch_ti
iewed-by: Marc Zyngier
Signed-off-by: Shih-Wei Li
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_arm.h | 4 ++--
arch/arm64/kvm/hyp/switch.c | 3 ---
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_
n
VBAR_EL2 has been set to the KVM exception vectors. On VHE, we can
always safely disable the traps and restore the host registers at this
point, so we simply do that unconditionally and call into the panic
function directly.
Acked-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm
e for switching to the host context, and we get the
benefit of only having to evaluate the dirty flag once on each path,
plus we give the compiler some more room to inline some of this
functionality.
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_hyp.h
drew Jones
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_host.h | 3 +++
arch/arm64/kernel/asm-offsets.c | 1 +
arch/arm64/kvm/hyp/entry.S| 3 +++
arch/arm64/kvm/hyp/switch.c | 48 ---
arch/arm
offer
[1]: git://git.kernel.org/pub/scm/linux/kernel/git/cdall/linux.git
level-mapped-v9
[2]: git://linux-arm.org/linux-jm.git sdei/v5/base
[3]: git://git.kernel.org/pub/scm/linux/kernel/git/cdall/linux.git
vhe-optimize-v3
Christoffer Dall (40):
KVM: arm/arm64: Avoid vcpu_load for other vcpu ioctls tha
e the _EL1 accessor on VHE systems, but this was actually unnecessary
as the _EL1 accessor aliases the ESR_EL2 register on VHE, and the _EL2
accessor does the same thing on both systems.
Cc: Ard Biesheuvel
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_a
eason about.
Luckily, now when we call vcpu_load in each ioctl implementation, we can
simply remove the call from the non-KVM_RUN vcpu ioctls, and our
kvm_arch_vcpu_load() is only used for loading vcpu content to the
physical CPU when we're actually going to run the vcpu.
Signed-off-by: Christ
On Fri, Jan 12, 2018 at 08:45:31AM +0100, Auger Eric wrote:
> Hi Christoffer
>
> On 11/01/18 19:55, Christoffer Dall wrote:
> > On Mon, Jan 08, 2018 at 10:52:54AM +0100, Eric Auger wrote:
> >> Commit 3d1ad640f8c94 ("KVM: arm/arm64: Fix GICv4 ITS initializ
On Mon, Jan 08, 2018 at 10:52:54AM +0100, Eric Auger wrote:
> Commit 3d1ad640f8c94 ("KVM: arm/arm64: Fix GICv4 ITS initialization
> issues") moved the vgic_supports_direct_msis() check in vgic_v4_init().
> However when vgic_v4_init is called from vgic_its_create(), the has_its
> field is not yet se
On Thu, Jan 11, 2018 at 3:23 PM, Punit Agrawal wrote:
> Christoffer Dall writes:
>
>> On Thu, Jan 11, 2018 at 01:01:07PM +, Punit Agrawal wrote:
>>> Christoffer Dall writes:
>>>
>>> > On Thu, Jan 04, 2018 at 06:24:33PM +, Punit Agrawal wrote:
On Thu, Jan 11, 2018 at 01:01:07PM +, Punit Agrawal wrote:
> Christoffer Dall writes:
>
> > On Thu, Jan 04, 2018 at 06:24:33PM +, Punit Agrawal wrote:
> >> KVM only supports PMD hugepages at stage 2 but doesn't actually check
> >> that the provided h
> Fix this by checking for the pagesize of userspace vma before creating
> PMD hugepage at stage 2.
>
> Fixes: ad361f093c1e31d ("KVM: ARM: Support hugetlbfs backed huge pages")
> Signed-off-by: Punit Agrawal
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> ---
On Tue, Jan 09, 2018 at 01:53:56PM +, Marc Zyngier wrote:
> On 09/01/18 13:43, Christoffer Dall wrote:
> > Add an extra temporary register parameter to uaccess_ttbr0_enable which
> > is about to be required for arm64 PAN support.
> >
> > This patch doesn't int
gable conflict.
Cc: Will Deacon
Cc: Catalin Marinas
Cc: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/asm-uaccess.h | 4 ++--
arch/arm64/mm/cache.S| 4 ++--
arch/arm64/xen/hypercall.S | 2 +-
3 files changed, 5 insertions(+), 5 deletions(-)
diff
On Mon, Jan 08, 2018 at 03:56:29PM +0100, Andrew Jones wrote:
> On Mon, Jan 08, 2018 at 03:18:15PM +0100, Christoffer Dall wrote:
> > Hi Drew,
> >
> > On Sat, Nov 25, 2017 at 06:40:31PM +0100, Andrew Jones wrote:
> > > Since commit 93390c0a1b20 ("arm64
Hi Drew,
On Sat, Nov 25, 2017 at 06:40:31PM +0100, Andrew Jones wrote:
> Since commit 93390c0a1b20 ("arm64: KVM: Hide unsupported AArch64 CPU
> features from guests") we can hide cpu features from guests. Apply
> this to a long standing issue where guests see a PMU available, but
> it's not, becau
On Wed, Dec 27, 2017 at 04:36:04PM +, Marc Zyngier wrote:
> On Wed, 20 Dec 2017 11:36:05 +,
> Christoffer Dall wrote:
> >
> > We currently check if the VM has a userspace irqchip in several places
> > along the critical path, and if so, we do some work which
On Mon, Dec 11, 2017 at 01:20:03PM +, Marc Zyngier wrote:
> On 07/12/17 17:06, Christoffer Dall wrote:
> > Some system registers do not affect the host kernel's execution and can
> > therefore be loaded when we are about to run a VCPU and we don't have to
> >
On Thu, Dec 21, 2017 at 05:16:48PM +0800, Jia He wrote:
>
> Sorry for the late, I ever thought you would send out v2 with isb().
> It seems not.
>
I did:
https://lists.cs.columbia.edu/pipermail/kvmarm/2017-December/029078.html
>
> On 12/15/2017 6:04 PM, Christoffer Dall Wro
On Wed, Dec 20, 2017 at 05:22:54PM +0100, Andrew Jones wrote:
> On Tue, Dec 19, 2017 at 02:07:06PM +0100, Christoffer Dall wrote:
> > On Tue, Dec 19, 2017 at 01:11:09PM +0100, Andrew Jones wrote:
> > > On Tue, Dec 19, 2017 at 10:06:20AM +0100, Christoffer Dall wrote:
> >
On Thu, Dec 21, 2017 at 10:21:29AM +0100, Andrew Jones wrote:
> On Wed, Dec 20, 2017 at 04:41:24PM -0500, Shih-Wei Li wrote:
> > On Wed, Dec 20, 2017 at 11:41 AM, Andrew Jones wrote:
> > > On Tue, Dec 19, 2017 at 08:34:45PM -0500, Shih-Wei Li wrote:
> > >> + while (i < iterations) {
>
f the virtual interrupt is
active, and otherwise we simply let the timer fire again and raise the
virtual interrupt from the ISR.
Reviewed-by: Eric Auger
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
include/kvm/arm_arch_timer.h | 2 ++
virt/kvm/arm/arch_timer.c
st with
an injected timer interrupt.
Reviewed-by: Marc Zyngier
Reviewed-by: Eric Auger
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/vgic/vgic-v2.c | 29 +
virt/kvm/arm/vgic/vgic-v3.c | 29 +
virt/kvm/arm/vgic/vgic
es to the timer (Patch 1)
- Added handling of guest MMIO accesses to the virtual distributor
(Patch 4)
- Addressed Marc's comments from the initial RFC (mostly renames)
Thanks,
-Christoffer
[1]: https://lists.cs.columbia.edu/pipermail/kvmarm/2017-June/026072.html
Christoffer Dall (
e
documentation as the code has evolved, and people who need to understand
these details are probably better off reading the code.
Let's lighten our maintenance burden slightly and just get rid of this.
Signed-off-by: Christoffer Dall
---
Documentation/virtual/kvm/arm/vgic-m
of mapped interrupts from userspace is not supported,
and it's expected that userspace unmaps devices from VFIO before
attempting to set the interrupt state, because the interrupt state is
driven by hardware.
Reviewed-by: Marc Zyngier
Reviewed-by: Eric Auger
Signed-off-by: Christoffer
o for other uses of per cpu variables either).
Acked-by: Marc Zyngier
Reviewed-by: Andre Przywara
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/arm.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c
index 6b60c98a6e22..3610e132df8b 100644
--- a/vir
nge in the line level, and when the
line level should be asserted from the timer ISR. The VGIC can ignore
extra notifications using its validate mechanism.
Reviewed-by: Marc Zyngier
Reviewed-by: Andre Przywara
Reviewed-by: Julien Thierry
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/ar
ip in userspace.
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_host.h | 2 ++
arch/arm64/include/asm/kvm_host.h | 2 ++
virt/kvm/arm/arch_timer.c | 6 ++--
virt/kvm/arm/arm.c| 59 ---
4 files changed, 50 insertions(+
to the good old method of poking the
physical GIC if no callback is provided.
Reviewed-by: Marc Zyngier
Reviewed-by: Eric Auger
Signed-off-by: Christoffer Dall
---
include/kvm/arm_vgic.h| 13 -
virt/kvm/arm/arch_timer.c | 3 ++-
virt/kvm/arm/vgic/vgic.c | 13 +
3
document the semantics of
the return value.
Also take the chance to move the functionality outside of holding a
spinlock and instead explicitly disable and enable preemption. This
supports PREEMPT_RT kernels as well.
Acked-by: Marc Zyngier
Reviewed-by: Andre Przywara
Signed-off-by: Christoffer
On Tue, Dec 19, 2017 at 02:17:38PM +, Julien Thierry wrote:
> Hi Christoffer,
>
> A few nits in the commit message.
>
> On 13/12/17 10:45, Christoffer Dall wrote:
> >The timer was modeled after a strict idea of modelling an interrupt line
>
> nit: modelling (a
On Wed, Dec 13, 2017 at 08:15:10PM +, Marc Zyngier wrote:
> On Wed, 13 Dec 2017 10:46:02 +,
> Christoffer Dall wrote:
> >
> > Now when we've reworked how mapped level-triggered interrupts are
> > processed for the timer interrupts, we update the docu
On Tue, Dec 19, 2017 at 01:55:25PM +, Marc Zyngier wrote:
> On 19/12/17 13:34, Christoffer Dall wrote:
> > On Wed, Dec 13, 2017 at 08:05:33PM +, Marc Zyngier wrote:
> >> On Wed, 13 Dec 2017 10:46:01 +,
> >> Christoffer Dall wrote:
> >>>
&
On Wed, Dec 13, 2017 at 08:05:33PM +, Marc Zyngier wrote:
> On Wed, 13 Dec 2017 10:46:01 +,
> Christoffer Dall wrote:
> >
> > We currently check if the VM has a userspace irqchip on every exit from
> > the VCPU, and if so, we do some work to ensure correct tim
On Tue, Dec 19, 2017 at 01:05:21PM +0300, Yury Norov wrote:
> On Tue, Dec 19, 2017 at 10:12:00AM +0100, Christoffer Dall wrote:
> > On Mon, Dec 18, 2017 at 08:31:21PM +0300, Yury Norov wrote:
> > > On Fri, Dec 15, 2017 at 04:15:39PM -0500, Shih-Wei Li wrote:
> > > > H
On Tue, Dec 19, 2017 at 01:11:09PM +0100, Andrew Jones wrote:
> On Tue, Dec 19, 2017 at 10:06:20AM +0100, Christoffer Dall wrote:
> > On Mon, Dec 18, 2017 at 03:58:49PM -0500, Shih-Wei Li wrote:
> > > On Mon, Dec 18, 2017 at 1:14 PM, Andrew Jones wrote:
> > > > Hi Sh
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