On Mon, Dec 18, 2017 at 08:31:21PM +0300, Yury Norov wrote:
> On Fri, Dec 15, 2017 at 04:15:39PM -0500, Shih-Wei Li wrote:
> > Here we provide the support for measuring various micro level
> > operations on arm64. We iterate each of the tests for millions of
> > times and output their average, mini
On Mon, Dec 18, 2017 at 03:58:49PM -0500, Shih-Wei Li wrote:
> On Mon, Dec 18, 2017 at 1:14 PM, Andrew Jones wrote:
> > Hi Shih-Wei,
> >
> > Thanks for doing this! Porting Christoffer's selftests to kvm-unit-tests
> > has been on the kvm-unit-tests' TODO list since it was first introduced.
> >
> >
read during the first save.
Make sure __debug_save_spe_nvhe clears the value of the saved PMSCR_EL1
when the guest cannot use SPE.
Signed-off-by: Julien Thierry
Cc: Christoffer Dall
Cc: Marc Zyngier
Cc: Catalin Marinas
Cc:
Reviewed-by: Will Deacon
Reviewed-by: Christoffer Dall
Signed-off-by
high_memory is defined as the linear map address of the last byte of
DRAM, plus one.
The size of the vmalloc region is given trivially by VMALLOC_END -
VMALLOC_START.
Cc: sta...@vger.kernel.org
Reported-by: Andre Przywara
Tested-by: Andre Przywara
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
arify the
intention of the implementation, and reduce the risk of unwanted
interrupts.
Fixes: b103cc3f10c0 ("KVM: arm/arm64: Avoid timer save/restore in vcpu
entry/exit")
Reported-by: Marc Zyngier
Reported-by: Jia He
Reviewed-by: Marc Zyngier
Tested-by: Marc Zyngier
Signed-off-by: C
ou to fetch changes up to 0eb7c33cadf6b2f1a94e58ded8b0eb89b4eba382:
KVM: arm/arm64: Fix timer enable flow (2017-12-18 10:53:24 +0100)
Thanks,
-Christoffer
Christoffer Dall (2):
KVM: arm/arm64: Properly handle arch-timer IRQs after vtimer_save_state
KVM: arm/arm64: Fix timer enable
timer state when enabling the
timer")
Reported-by: Marc Zyngier
Reviewed-by: Marc Zyngier
Tested-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/arch_timer.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/ar
From: Marc Zyngier
If we don't have a usable GIC, do not try to set the vcpu affinity
as this is guaranteed to fail.
Reported-by: Andre Przywara
Reviewed-by: Andre Przywara
Tested-by: Andre Przywara
Reviewed-by: Christoffer Dall
Signed-off-by: Marc Zyngier
Signed-off-by: Christoffer
On Mon, Dec 11, 2017 at 01:20:03PM +, Marc Zyngier wrote:
> On 07/12/17 17:06, Christoffer Dall wrote:
> > Some system registers do not affect the host kernel's execution and can
> > therefore be loaded when we are about to run a VCPU and we don't have to
> >
arify the
intention of the implementation, and reduce the risk of unwanted
interrupts.
Fixes: b103cc3f10c0 ("KVM: arm/arm64: Avoid timer save/restore in vcpu
entry/exit")
Reported-by: Marc Zyngier
Reported-by: Jia He
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/ar
r platform.
Thanks,
-Christoffer
Christoffer Dall (2):
KVM: arm/arm64: Properly handle arch-timer IRQs after
vtimer_save_state
KVM: arm/arm64: Fix timer enable flow
virt/kvm/arm/arch_timer.c | 27 ---
1 file changed, 16 insertions(+), 11 deletions(-)
timer state when enabling the
timer")
Reported-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/arch_timer.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
index 14c018f990a7..cc29a8148328 100644
On Fri, Dec 15, 2017 at 10:33:48AM +, Marc Zyngier wrote:
> On 15/12/17 10:10, Christoffer Dall wrote:
> > On Fri, Dec 15, 2017 at 09:09:05AM +, Marc Zyngier wrote:
> >> On 15/12/17 02:27, Jia He wrote:
> >>>
> >>>
> >>
>
On Fri, Dec 15, 2017 at 09:09:05AM +, Marc Zyngier wrote:
> On 15/12/17 02:27, Jia He wrote:
> >
> >
>
> [...]
>
> >> @@ -367,6 +368,7 @@ static void vtimer_save_state(struct kvm_vcpu *vcpu)
> >>
> >>/* Disable the virtual timer */
> >>write_sysreg_el0(0, cntv_ctl);
> >> + isb()
+if (kvm_timer_irq_can_fire(cnt_ctl))
> > kvm_timer_update_irq(vcpu, true, vtimer);
> IIUC, your patch makes kvm_arch_timer_handler never changesvtimer->cnt_ctl
Yes, that's the idea.
Meanwhile, I think I thought of a cleaner way to do this. Could you
test the foll
On Thu, Dec 14, 2017 at 11:28:04PM +0800, Jia He wrote:
>
> On 12/14/2017 9:09 PM, Christoffer Dall Wrote:
> >On Thu, Dec 14, 2017 at 12:57:54PM +0800, Jia He wrote:
> >Hi Jia,
> >
> >>I have tried your newer level-mapped-v7 branch, but bug is still there.
>
On Mon, Dec 11, 2017 at 10:44:59AM +, Marc Zyngier wrote:
> On 07/12/17 17:06, Christoffer Dall wrote:
> > On non-VHE systems we need to save the ELR_EL2 and SPSR_EL2 so that we
> > can return to the host in EL1 in the same state and location where we
> > issued a hyperc
On Thu, Dec 14, 2017 at 12:57:54PM +0800, Jia He wrote:
Hi Jia,
>
> I have tried your newer level-mapped-v7 branch, but bug is still there.
>
> There is no special load in both host and guest. The guest (kernel
> 4.14) is often hanging when booting
>
> the guest kernel log
>
> [ OK ] Reached t
On Mon, Dec 11, 2017 at 10:14:23AM +, Marc Zyngier wrote:
> On 07/12/17 17:06, Christoffer Dall wrote:
> > There's a semantic difference between the EL1 registers that control
> > operation of a kernel running in EL1 and EL1 registers that only control
> > userspace e
On Mon, Dec 11, 2017 at 10:02:58AM +, Marc Zyngier wrote:
> On 07/12/17 17:06, Christoffer Dall wrote:
> > The VHE switch function calls __timer_enable_traps and
> > __timer_disable_traps which don't do anything on VHE systems.
> > Therefore, simply remove these
On Mon, Dec 11, 2017 at 09:53:13AM +, Marc Zyngier wrote:
> On 07/12/17 17:06, Christoffer Dall wrote:
> > So far this is just a copy of the legacy non-VHE switch function, where
> > we only change the existing calls to has_vhe() in both the original and
> > new functions
st with
an injected timer interrupt.
Reviewed-by: Marc Zyngier
Reviewed-by: Eric Auger
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/vgic/vgic-v2.c | 29 +
virt/kvm/arm/vgic/vgic-v3.c | 29 +
virt/kvm/arm/vgic/vgic
Now when we've reworked how mapped level-triggered interrupts are
processed for the timer interrupts, we update the documentation
correspondingly.
Signed-off-by: Christoffer Dall
---
Documentation/virtual/kvm/arm/vgic-mapped-irqs.txt | 50 ++
1 file changed, 23 inser
document the semantics of
the return value.
Also take the chance to move the functionality outside of holding a
spinlock and instead explicitly disable and enable preemption. This
supports PREEMPT_RT kernels as well.
Acked-by: Marc Zyngier
Reviewed-by: Andre Przywara
Signed-off-by: Christoffer
Auger
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/arch_timer.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c
index f8d09665ddce..73d262c4712b 100644
--- a/virt/kvm/arm/arch_timer.c
+++ b/virt/kvm/arm/arch_ti
o for other uses of per cpu variables either).
Acked-by: Marc Zyngier
Reviewed-by: Andre Przywara
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/arm.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c
index a6524ff27de4..859ff7e3a1eb 100644
--- a/vir
f the virtual interrupt is
active, and otherwise we simply let the timer fire again and raise the
virtual interrupt from the ISR.
Reviewed-by: Eric Auger
Signed-off-by: Christoffer Dall
---
include/kvm/arm_arch_timer.h | 2 ++
virt/kvm/arm/arch_timer.c
ndling of guest MMIO accesses to the virtual distributor
(Patch 4)
- Addressed Marc's comments from the initial RFC (mostly renames)
Thanks,
-Christoffer
[1]: https://lists.cs.columbia.edu/pipermail/kvmarm/2017-June/026072.html
Christoffer Dall (9):
KVM: arm/arm64: Remove redundant pree
to the good old method of poking the
physical GIC if no callback is provided.
Reviewed-by: Marc Zyngier
Reviewed-by: Eric Auger
Signed-off-by: Christoffer Dall
---
include/kvm/arm_vgic.h| 13 -
virt/kvm/arm/arch_timer.c | 3 ++-
virt/kvm/arm/vgic/vgic.c | 13 +
3
of mapped interrupts from userspace is not supported,
and it's expected that userspace unmaps devices from VFIO before
attempting to set the interrupt state, because the interrupt state is
driven by hardware.
Reviewed-by: Marc Zyngier
Reviewed-by: Eric Auger
Signed-off-by: Christoffer
the
line level should be asserted from the timer ISR. The VGIC can ignore
extra notifications using its validate mechanism.
Reviewed-by: Andre Przywara
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/arch_timer.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
di
On Wed, Dec 13, 2017 at 10:27 AM, Marc Zyngier wrote:
> On 13/12/17 09:08, Auger Eric wrote:
>> Marc,
>> On 13/12/17 09:56, Marc Zyngier wrote:
>>> Hi Jia,
>>>
>>> On 13/12/17 07:00, Jia He wrote:
In our Armv8a server (qualcomm Amberwing, non VHE), after applying
Christoffer's timer opti
On Wed, Dec 13, 2017 at 08:56:12AM +, Marc Zyngier wrote:
> Hi Jia,
>
> On 13/12/17 07:00, Jia He wrote:
> > In our Armv8a server (qualcomm Amberwing, non VHE), after applying
> > Christoffer's timer optimizing patchset(Optimize arch timer register
> > handling), the guest is hang during kerne
On Tue, Dec 12, 2017 at 11:00:07PM -0800, Jia He wrote:
> In our Armv8a server (qualcomm Amberwing, non VHE), after applying
> Christoffer's timer optimizing patchset(Optimize arch timer register
> handling), the guest is hang during kernel booting.
>
> The error root cause might be as follows:
>
On Tue, Dec 12, 2017 at 09:40:10AM +0100, Auger Eric wrote:
>
>
> On 11/12/17 21:51, Auger Eric wrote:
> > Hi Christoffer,
> > On 07/12/17 11:54, Christoffer Dall wrote:
> >> The timer was modeled after a strict idea of modelling an interrupt line
> >&g
On Tue, Dec 12, 2017 at 01:08:30PM +, Marc Zyngier wrote:
> On 11/12/17 11:24, Christoffer Dall wrote:
> > On Mon, Dec 11, 2017 at 11:10:36AM +, Marc Zyngier wrote:
> >> On 07/12/17 17:06, Christoffer Dall wrote:
> >>> When we defer the save/restore of sys
On Mon, Dec 11, 2017 at 02:51:36PM +, Dave Martin wrote:
> On Fri, Nov 24, 2017 at 03:45:38PM +0100, Christoffer Dall wrote:
> > On Thu, Nov 23, 2017 at 06:40:50PM +, Dave Martin wrote:
> > > On Wed, Nov 22, 2017 at 08:52:30PM +0100, Christoffer Dall wrot
Hi Yury,
On Mon, Dec 11, 2017 at 05:43:23PM +0300, Yury Norov wrote:
>
> On Thu, Dec 07, 2017 at 06:05:54PM +0100, Christoffer Dall wrote:
> > This series redesigns parts of KVM/ARM to optimize the performance on
> > VHE systems. The general approach is to try to do
On Mon, Dec 11, 2017 at 02:12:41PM +0100, Cornelia Huck wrote:
> On Mon, 4 Dec 2017 21:35:36 +0100
> Christoffer Dall wrote:
>
> > From: Christoffer Dall
> >
> > Move the calls to vcpu_load() and vcpu_put() in to the architecture
> > specific implementatio
On Mon, Dec 11, 2017 at 01:39:43PM +0100, Cornelia Huck wrote:
> On Mon, 4 Dec 2017 21:35:33 +0100
> Christoffer Dall wrote:
>
> > From: Christoffer Dall
> >
> > Move vcpu_load() and vcpu_put() into the architecture specific
> > implementations of kv
On Mon, Dec 11, 2017 at 11:10:36AM +, Marc Zyngier wrote:
> On 07/12/17 17:06, Christoffer Dall wrote:
> > When we defer the save/restore of system registers to vcpu_load and
> > vcpu_put, we need to take care of the emulation code that handles traps
> > to these re
On Sat, Dec 09, 2017 at 05:37:53PM +, Marc Zyngier wrote:
> On Thu, 07 Dec 2017 17:06:00 +,
> Christoffer Dall wrote:
> >
> > Avoid saving the guest VFP registers and restoring the host VFP
> > registers on every exit from the VM. Only when we're about
On Sat, Dec 09, 2017 at 05:19:41PM +, Marc Zyngier wrote:
> On Thu, 07 Dec 2017 17:05:55 +,
> Christoffer Dall wrote:
> >
> > We already have the percpu area for the host cpu state, which points to
> > the VCPU, so there's no need to store the VCPU poin
On Fri, Dec 08, 2017 at 05:26:02PM +0100, David Hildenbrand wrote:
>
> >
> > int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs
> > *regs)
> > diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
> > index f647e121070e..cdf0be02c95a 100644
> > --- a/arch/powerp
On Thu, Dec 07, 2017 at 11:46:15AM +, Marc Zyngier wrote:
> If we don't have a usable GIC, do not try to set the vcpu affinity
> as this is guaranteed to fail.
Reviewed-by: Christoffer Dall
... and applied.
Thanks for fixing my broken code,
-Christoffer
>
> Reported-b
OC_END -
VMALLOC_START.
Otherwise:
Reviewed-by: Christoffer Dall
>
> Cc: sta...@vger.kernel.org
> Reported-by: Andre Przywara
> Signed-off-by: Marc Zyngier
> ---
> virt/kvm/arm/mmu.c | 10 --
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> d
for migration. To make sure
this works, factor out the APR save/restore functionality into separate
functions called from the VCPU (and by extension VGIC) put/load hooks.
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_hyp.h | 2 +
arch/arm64/include/asm/kvm_hyp.h | 2 +
virt
: Christoffer Dall
---
arch/arm64/kvm/hyp/switch.c | 72 -
1 file changed, 39 insertions(+), 33 deletions(-)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index 2ac8af354de0..c01bcfc3fb52 100644
--- a/arch/arm64/kvm/hyp/switch.c
+++ b
these during vcpu load/put.
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_hyp.h | 3 +++
arch/arm64/kvm/hyp/switch.c | 34 --
arch/arm64/kvm/hyp/sysreg-sr.c | 4
3 files changed, 31 insertions(+), 10 deletions(-)
diff --git a/arch/arm64
Handle accesses to any AArch32 EL1 system registers where we can defer
saving and restoring them to vcpu_load and vcpu_put, and which are
stored in special EL2 registers only used support 32-bit guests.
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_emulate.h | 9 -
1
remove the ifdef in the C file.
Reviewed-by: Andre Przywara
Signed-off-by: Christoffer Dall
---
arch/arm/kvm/hyp/Makefile | 1 -
arch/arm64/kvm/hyp/Makefile | 2 +-
{virt/kvm/arm => arch/arm64/kvm}/hyp/vgic-v2-sr.c | 2 --
3 files changed, 1 insert
while executing KVM kernel code and KVM doesn't use
floating point itself.
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/switch.c | 35 ++-
1 file changed, 26 insertions(+), 9 deletions(-)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hy
To make the code more readable and to avoid the overhead of a function
call, let's get rid of a pair of the alternative function selectors and
explicitly call the VHE and non-VHE functions instead, telling the
compiler to try to inline the static function if it can.
Signed-off-by: Christ
the endianness conversion in the VGIC save
function, which is completely unnecessary and would actually result in
incorrect functionality on big-endian systems, because we are only using
typed values here and not converting pointers and reading different
types here.
Signed-off-by: Christoffer Dall
from the physical CPU when we're on a VHE system that has loaded the
system registers onto the physical CPU.
Signed-off-by: Christoffer Dall
---
Notes:
Changes since v1:
- Removed spurious white space
arch/arm64/include/asm/kvm_host.h | 4 +++
arch/arm64/kvm/sys_regs.c
We can program the GICv2 hypervisor control interface logic directly
from the core vgic code and can instead do the save/restore directly
from the flush/sync functions, which can lead to a number of future
optimizations.
Signed-off-by: Christoffer Dall
---
Notes:
Changes since v1
We can trap access to ACTLR_EL1 which we can later defer to only
save/restore during vcpu_load and vcpu_put, so let's read the value
directly from the CPU when necessary.
Signed-off-by: Christoffer Dall
---
Notes:
Changes since v1:
- Fix bug in access_actlr that read the actlr_el
Handle accesses during traps to any remaining EL1 registers which can be
deferred to vcpu_load and vcpu_put, by either accessing them directly on
the physical CPU when the latest version is stored there, or by
synchronizing the memory representation with the CPU state.
Signed-off-by: Christoffer
t can be deferred to vcpu_load and vcpu_put, respectively.
We have already prepared the trap handling code which accesses any of
these registers to directly access the registers on the physical CPU or
to sync the registers when needed.
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/switch.c
function calls from the VHE
world switch function.
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/switch.c | 3 ---
virt/kvm/arm/vgic/vgic.c| 5 +
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index
when running in the host), and doing the
configuration on every round-trip on non-VHE systems.
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_hyp.h | 2 +
arch/arm/kvm/hyp/switch.c| 8 ++-
arch/arm64/include/asm/kvm_hyp.h | 2 +
arch/arm64/kvm/hyp/switch.c | 8
As we are about to move calls around in the sysreg save/restore logic,
let's first rewrite the alternative function callers, because it is
going to make the next patches much easier to read.
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/sysreg-sr.c | 17 -
1
much easier when we have to start
accessing system registers that use deferred save/restore and might
have to be read directly from the physical CPU.
Reviewed-by: Andrew Jones
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_host.h | 8
arch/arm64/kvm/sys_regs.c | 20
VHE and non-VHE functionality now that we have
separate functions.
Reviewed-by: Andrew Jones
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_hyp.h | 12
arch/arm64/kvm/hyp/switch.c | 20 ++--
arch/arm64/kvm/hyp/sysreg-sr.c | 40
VHE kernels run completely in EL2 and therefore don't have a notion of
kernel and hyp addresses, they are all just kernel addresses. Therefore
don't call kern_hyp_va() in the VHE switch function.
Reviewed-by: Andrew Jones
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/sw
ff-by: Christoffer Dall
---
arch/arm64/kvm/hyp/switch.c | 2 --
virt/kvm/arm/hyp/timer-sr.c | 36 ++--
2 files changed, 14 insertions(+), 24 deletions(-)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index e783e2371b7c..09aafa0470f7 100644
There is no need to reset the VTTBR to zero when exiting the guest on
VHE systems. VHE systems don't use stage 2 translations for the EL2&0
translation regime used by the host.
Reviewed-by: Andrew Jones
Signed-off-by: Christoffer Dall
---
Notes:
Changes since v1:
The comment only applied to SPE on non-VHE systems, so we simply remove
it.
Suggested-by: Andrew Jones
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/switch.c | 4
1 file changed, 4 deletions(-)
diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c
index
e the other into simply save/restore.
Reviewed-by: Andrew Jones
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_hyp.h | 6 ++
arch/arm64/kvm/hyp/switch.c | 10 +-
arch/arm64/kvm/hyp/sysreg-sr.c | 18 ++
3 files changed, 9 insertions(+), 25 dele
e the function saving/restoring the
remaining system register to make it clear this function deals with
the EL1 system registers.
No functional change.
Reviewed-by: Andrew Jones
Signed-off-by: Christoffer Dall
---
Notes:
Changes since v1:
- Added comment about sp_el0 to common save sysreg
So far this is just a copy of the legacy non-VHE switch function, where
we only change the existing calls to has_vhe() in both the original and
new functions.
Signed-off-by: Christoffer Dall
---
Notes:
Changes since v1:
- Rename kvm_vcpu_run to kvm_vcpu_run_vhe and rename
these registers into separate save/restore functions, making
it easy to exclude them from the VHE world-switch path later on.
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp/sysreg-sr.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm64/kvm/hyp/sysreg-sr.c b/arch/
s and function calls unless necessary).
We also use a static key on the restore path, because it will be
marginally faster than loading a value from memory.
Finally, we don't have to conditionally clear the debug dirty flag if
it's set, we can just clear it.
Signed-off-by: Christoffer D
There is no need to figure out inside the world-switch if we should
save/restore the debug registers or not, we can might as well do that in
the higher level debug setup code, making it easier to optimize down the
line.
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/debug.c| 5
switch
functions.
No functional change.
Signed-off-by: Christoffer Dall
---
Notes:
Changes since v1:
- Fixed typos in commit message
- Changed comment in fixup_guest_exit
- Us do-while instead of jumping to a label
arch/arm64/kvm/hyp/switch.c | 99
drew Jones
Signed-off-by: Christoffer Dall
---
Notes:
Changes since v1:
- Cosmetic changes
- Change the flags variable to a u8
- Expanded the commit message
arch/arm64/include/asm/kvm_emulate.h | 5
arch/arm64/include/asm/kvm_host.h| 3 +++
arch/arm64/kernel/asm
As we are about to move a bunch of save/restore logic for VHE kernels to
the load and put functions, we need some infrastructure to do this.
Reviewed-by: Andrew Jones
Signed-off-by: Christoffer Dall
---
Notes:
Changes since v1:
- Reworded comments as suggested by Drew
arch/arm
e for switching to the host context, and we get the
benefit of only having to evaluate the dirty flag once on each path,
plus we give the compiler some more room to inline some of this
functionality.
Signed-off-by: Christoffer Dall
---
Notes:
Changes since v1:
- Remove leading underscores
odify the bits in the vcpu->arch.hcr[_el2] directly when
needed.
Acked-by: Marc Zyngier
Reviewed-by: Andrew Jones
Reviewed-by: Julien Thierry
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/kvm_emulate.h | 9 ++---
arch/arm/include/asm/kvm_host.h | 3 ---
arch/arm/kvm/e
iewed-by: Marc Zyngier
Signed-off-by: Shih-Wei Li
Signed-off-by: Christoffer Dall
---
arch/arm64/include/asm/kvm_arm.h | 4 ++--
arch/arm64/kvm/hyp/switch.c | 3 ---
2 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_
/git.kernel.org/pub/scm/linux/kernel/git/cdall/linux.git
vcpu-load-put-v3
[5]: git://git.kernel.org/pub/scm/linux/kernel/git/cdall/linux.git
vhe-optimize-v2
Christoffer Dall (35):
KVM: arm64: Avoid storing the vcpu pointer on the stack
KVM: arm64: Rework hyp_panic for VHE and non-VHE
KVM:
n
VBAR_EL2 has been set to the KVM exception vectors. On VHE, we can
always safely disable the traps and restore the host registers at this
point, so we simply do that unconditionally and call into the panic
function directly.
Signed-off-by: Christoffer Dall
---
Notes:
Changes since v1:
e the _EL1 accessor on VHE systems, but this was actually unnecessary
as the _EL1 accessor aliases the ESR_EL2 register on VHE, and the _EL2
accessor does the same thing on both systems.
Cc: Ard Biesheuvel
Signed-off-by: Christoffer Dall
---
Notes:
Changes since v1:
- Use PC-relative add
the
line level should be asserted from the timer ISR. The VGIC can ignore
extra notifications using its validate mechanism.
Reviewed-by: Andre Przywara
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/arch_timer.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
di
of mapped interrupts from userspace is not supported,
and it's expected that userspace unmaps devices from VFIO before
attempting to set the interrupt state, because the interrupt state is
driven by hardware.
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/vgic
to the good old method of poking the
physical GIC if no callback is provided.
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
include/kvm/arm_vgic.h| 13 -
virt/kvm/arm/arch_timer.c | 3 ++-
virt/kvm/arm/vgic/vgic.c | 12 +---
3 files changed, 23
n ARM is mostly a developer or hobby
feature, and is unlikely to be used in servers or other scenarios where
performance is a priority, we can use a refcounted static key to only
check the irqchip configuration when we have at least one VM that uses
an irqchip in userspace.
Signed-off-by: Christ
f the virtual interrupt is
active, and otherwise we simply let the timer fire again and raise the
virtual interrupt from the ISR.
Signed-off-by: Christoffer Dall
---
include/kvm/arm_arch_timer.h | 2 ++
virt/kvm/arm/arch_timer.c| 75 +---
2 files ch
st with
an injected timer interrupt.
Reviewed-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/vgic/vgic-v2.c | 29 +
virt/kvm/arm/vgic/vgic-v3.c | 29 +
virt/kvm/arm/vgic/vgic.c| 23 +++
virt/kv
document the semantics of
the return value.
Also take the chance to move the functionality outside of holding a
spinlock and instead explicitly disable and enable preemption. This
supports PREEMPT_RT kernels as well.
Acked-by: Marc Zyngier
Reviewed-by: Andre Przywara
Signed-off-by: Christoffer
enames)
Thanks,
-Christoffer
[1]: https://lists.cs.columbia.edu/pipermail/kvmarm/2017-June/026072.html
Christoffer Dall (8):
KVM: arm/arm64: Remove redundant preemptible checks
KVM: arm/arm64: Factor out functionality to get vgic mmio
requester_vcpu
KVM: arm/arm64: Don't cache the timer IRQ le
o for other uses of per cpu variables either).
Acked-by: Marc Zyngier
Reviewed-by: Andre Przywara
Signed-off-by: Christoffer Dall
---
virt/kvm/arm/arm.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c
index a6524ff27de4..859ff7e3a1eb 100644
--- a/vir
on the same vcpu,
> restore will write the value of PMSCR_EL1 read during the first save.
>
> Make sure __debug_save_spe_nvhe clears the value of the saved PMSCR_EL1
> when the guest cannot use SPE.
>
> Signed-off-by: Julien Thierry
> Cc: Christoffer Dall
> Cc: Marc Zyngie
On Wed, Dec 06, 2017 at 05:17:28PM +0300, Yury Norov wrote:
> On Wed, Dec 06, 2017 at 11:59:04AM +0100, Christoffer Dall wrote:
> > On Tue, Dec 05, 2017 at 06:24:46PM +0300, Yury Norov wrote:
> > > On Mon, Dec 04, 2017 at 09:05:05PM +0100, Christoffer Dall wrote:
> > &g
On Tue, Dec 05, 2017 at 06:24:46PM +0300, Yury Norov wrote:
> On Mon, Dec 04, 2017 at 09:05:05PM +0100, Christoffer Dall wrote:
> > From: Christoffer Dall
> >
> > The VGIC can now support the life-cycle of mapped level-triggered
> > interrupts, and we no longer have t
On Tue, Dec 05, 2017 at 04:46:08PM +0300, Yury Norov wrote:
> On Mon, Dec 04, 2017 at 09:05:00PM +0100, Christoffer Dall wrote:
> > From: Christoffer Dall
> >
> > We are about to distinguish between userspace accesses and mmio traps
> > for a number of the mmio handler
On Tue, Dec 05, 2017 at 12:31:51PM +, Dave Martin wrote:
> On Tue, Dec 05, 2017 at 10:09:15AM +0100, Christoffer Dall wrote:
> > On Fri, Dec 01, 2017 at 03:19:40PM +, Dave Martin wrote:
> > > The HCR_EL2.TID3 flag needs to be set when trapping guest access to
> > &
Hi Dave,
On Mon, Dec 04, 2017 at 03:36:50PM +, Dave Martin wrote:
> On Mon, Dec 04, 2017 at 01:53:21PM +, Ard Biesheuvel wrote:
> > On 1 December 2017 at 15:19, Dave Martin wrote:
> > > When deciding whether to invalidate FPSIMD state cached in the cpu,
> > > the backend function sve_flus
thout the need for
> conditional logic on the critical path.
>
> Signed-off-by: Dave Martin
> Suggested-by: Christoffer Dall
> Cc: Marc Zyngier
Reviewed-by: Christoffer Dall
>
> ---
>
> Note to maintainers: this was discussed on-list [1] prior to the merge
&
From: Christoffer Dall
Move vcpu_load() and vcpu_put() into the architecture specific
implementations of kvm_arch_vcpu_ioctl_set_regs().
Signed-off-by: Christoffer Dall
---
arch/mips/kvm/mips.c | 3 +++
arch/powerpc/kvm/book3s.c | 3 +++
arch/powerpc/kvm/booke.c | 3 +++
arch/s390/kvm
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