[PATCHv2 01/12] asm-generic: mm_hooks: allow hooks to be overridden individually

, allow each hook to be overridden indiviually, by placing each under an #ifndef block. As architectures providing their own hooks can't include this file today, this shouldn't adversely affect any existing hooks. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Arnd Bergmann <a...@arn

[PATCHv2 02/12] arm64: add pointer authentication register bits

ESR_ELx.EC code used when the new instructions are affected by configurable traps This patch adds the relevant definitions to and for these, to be used by subsequent patches. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Suzu

[PATCHv2 00/12] ARMv8.3 pointer authentication userspace support

://git.kernel.org/pub/scm/linux/kernel/git/mark/boot-wrapper-aarch64.git pointer-auth Mark Rutland (12): asm-generic: mm_hooks: allow hooks to be overridden individually arm64: add pointer authentication register bits arm64/cpufeature: add ARMv8.3 id_aa64isar1 bits arm64/cpufeature: detect

Re: [PATCH v1 1/3] arm64: add a macro for SError synchronization

On Wed, Nov 01, 2017 at 08:54:44PM +0800, gengdongjiu wrote: > On 2017/11/1 19:24, Robin Murphy wrote: > >> + esb > >> +alternative_else_nop_endif > >> +1: > >> + .endm > > Having a branch in here is pretty horrible, and furthermore using label > > number 1 has a pretty high chance of subtly

Re: [PATCH v2 2/8] arm: KVM: Add optimized PIPT icache flushing

On Sat, Oct 21, 2017 at 05:18:17PM +0200, Christoffer Dall wrote: > On Fri, Oct 20, 2017 at 05:54:40PM +0100, Mark Rutland wrote: > > On Fri, Oct 20, 2017 at 05:53:39PM +0100, Marc Zyngier wrote: > > > On 20/10/17 17:27, Mark Rutland wrote: > > > > On Fri, Oct 20,

Re: [PATCH v4 25/26] KVM: arm/arm64: GICv4: Prevent heterogenous systems from using GICv4

On Fri, Oct 27, 2017 at 08:59:23AM +0100, Marc Zyngier wrote: > On Fri, Oct 27 2017 at 8:37:28 am BST, Mark Rutland <mark.rutl...@arm.com> > wrote: > > On Fri, Oct 27, 2017 at 07:57:12AM +0100, Marc Zyngier wrote: > >> On Thu, Oct 26 2017 at 4:48:39 pm BST, Ma

Re: [PATCH v4 25/26] KVM: arm/arm64: GICv4: Prevent heterogenous systems from using GICv4

On Fri, Oct 27, 2017 at 07:57:12AM +0100, Marc Zyngier wrote: > On Thu, Oct 26 2017 at 4:48:39 pm BST, Mark Rutland <mark.rutl...@arm.com> > wrote: > > On Fri, Oct 06, 2017 at 04:34:00PM +0100, Marc Zyngier wrote: > >> @@ -485,8 +495,21 @@ int vgic_v3_probe(cons

Re: [PATCH v4 25/26] KVM: arm/arm64: GICv4: Prevent heterogenous systems from using GICv4

Hi, On Fri, Oct 06, 2017 at 04:34:00PM +0100, Marc Zyngier wrote: > The GICv4 architecture doesn't prevent CPUs implementing GICv4 to > cohabit with CPUs limited to GICv3 in the same system. > > This is mad (the scheduler would have to be made aware of the v4 > capability), and we're certainly

Re: [PATCH v2 2/8] arm: KVM: Add optimized PIPT icache flushing

On Fri, Oct 20, 2017 at 05:53:39PM +0100, Marc Zyngier wrote: > Hi Mark, > > On 20/10/17 17:27, Mark Rutland wrote: > > Hi Marc, > > > > On Fri, Oct 20, 2017 at 04:48:58PM +0100, Marc Zyngier wrote: > >> @@ -181,18 +185,40 @@ static inline void > &

Re: [PATCH v2 2/8] arm: KVM: Add optimized PIPT icache flushing

Hi Marc, On Fri, Oct 20, 2017 at 04:48:58PM +0100, Marc Zyngier wrote: > @@ -181,18 +185,40 @@ static inline void > __invalidate_icache_guest_page(struct kvm_vcpu *vcpu, > return; > } > > - /* PIPT cache. As for the d-side, use a temporary kernel mapping. */ > + /*

Re: [PATCH 00/11] ARMv8.3 pointer authentication userspace support

On Tue, Jul 25, 2017 at 01:06:43PM +0100, Mark Rutland wrote: > On Fri, Jul 21, 2017 at 06:05:09PM +0100, Dave Martin wrote: > > On Wed, Jul 19, 2017 at 05:01:21PM +0100, Mark Rutland wrote: > > > This series adds support for the ARMv8.3 pointer authentication extension. >

Re: [PATCH 10/11] arm64/kvm: context-switch ptrauth registers

On Tue, Aug 01, 2017 at 01:00:14PM +0200, Christoffer Dall wrote: > On Wed, Jul 19, 2017 at 05:01:31PM +0100, Mark Rutland wrote: > > When pointer authentication is supported, a guest may wish to use it. > > This patch adds the necessary KVM infrastructure for this to work, with

Re: [PATCH 00/11] ARMv8.3 pointer authentication userspace support

Hi, On Tue, Jul 25, 2017 at 12:32:10PM +0100, Yao Qi wrote: > On 19/07/17 17:01, Mark Rutland wrote: > > If authentication fails, bits are set in the pointer such that it is > > guaranteed to cause a fault if used. > > How does user space know the fault is caused b

Re: [RFC 7/9] arm64: expose PAC bit positions via ptrace

On Tue, Jul 25, 2017 at 01:11:48PM +0100, Dave Martin wrote: > On Mon, Apr 03, 2017 at 04:19:23PM +0100, Mark Rutland wrote: > > +/* > > + * The pointer bits used by a pointer authentication code. > > + * If we were to use tagged pointers, bits 63:56 would also apply.

Re: [PATCH 00/11] ARMv8.3 pointer authentication userspace support

On Fri, Jul 21, 2017 at 06:05:09PM +0100, Dave Martin wrote: > On Wed, Jul 19, 2017 at 05:01:21PM +0100, Mark Rutland wrote: > > This series adds support for the ARMv8.3 pointer authentication extension. > > Open questions > > == > > > > * Should k

[PATCH 07/11] arm64: add basic pointer authentication support

, APDBKey) are disabled, and will behave as NOPs. These may be made use of in future patches. No support is added for the generic key (APGAKey), though this cannot be trapped or made to behave as a NOP. Its presence is not advertised with a hwcap. Signed-off-by: Mark Rutland <mark.rutl...@arm.com&

[PATCH 10/11] arm64/kvm: context-switch ptrauth registers

. This is sufficient for systems with uniform pointer authentication support. For systems with mismatched support, it will be necessary to hide the feature from the guest's view of the ID registers. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc:

[PATCH 11/11] arm64: docs: document pointer authentication

Now that we've added code to support pointer authentication, add some documentation so that people can figure out if/how to use it. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Jiong Wang <jiong.w...@arm.com> Cc: Wil

[PATCH 09/11] arm64/kvm: preserve host HCR_EL2 value

in __tlb_switch_to_guest_vhe(). The now unused HCR_HOST_VHE_FLAGS definition is removed. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: kvmarm@lists.cs.columbia.edu --- arch/arm64/inc

[PATCH 06/11] arm64: Don't trap host pointer auth use to EL2

HCR_EL2 itself. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: Will Deacon <will.dea...@arm.com> Cc: kvmarm@lists.cs.columbia.e

[PATCH 05/11] arm64/cpufeature: detect pointer authentication

So that we can dynamically handle the presence of pointer authentication functionality, wire up probing code in cpufeature.c. Currently, this only detects the presence of an architected algorithm. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@ar

[PATCH 04/11] arm64/cpufeature: add ARMv8.3 id_aa64isar1 bits

ned-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Will Deacon <will.dea...@arm.com> Cc: Suzuki K Poulose <suzuki.poul...@arm.com> --- arch/arm64/kernel/cpufeature.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(

[PATCH 02/11] asm-generic: mm_hooks: allow hooks to be overridden individually

, allow each hook to be overridden indiviually, by placing each under an #ifndef block. As architectures providing their own hooks can't include this file today, this shouldn't adversely affect any existing hooks. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Arnd Bergmann <a...@arn

[PATCH 03/11] arm64: add pointer authentication register bits

ESR_ELx.EC code used when the new instructions are affected by configurable traps This patch adds the relevant definitions to and for these, to be used by subsequent patches. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Suzu

[PATCH 00/11] ARMv8.3 pointer authentication userspace support

://lists.infradead.org/pipermail/linux-arm-kernel/2017-April/498941.html [2] git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git arm64/pointer-auth [3] git://git.kernel.org/pub/scm/linux/kernel/git/mark/boot-wrapper-aarch64.git pointer-auth Mark Rutland (11): arm64: docs: describe ELF hwcaps asm-generic

[PATCH 01/11] arm64: docs: describe ELF hwcaps

that developers could refer to. This patch adds a document describing the (native) arm64 ELF hwcaps. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Dave Martin <dave.mar...@arm.com> Cc: Suzuki K Poulose <suzuki.poul...@arm.com> C

[PATCH 2/2] arm64/kvm: vgic: use SYS_DESC()

Almost all of the arm64 KVM code uses the sysreg mnemonics for AArch64 register descriptions. Move the last straggler over. To match what we do for SYS_ICH_AP*R*_EL2, the SYS_ICC_AP*R*_EL1 mnemonics are expanded in . Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin M

[PATCH 0/2] arm64/kvm: use SYS_REG_DESC() for VGIC-v3

://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git kvm-arm64/gicv3-cpuif-mediated-access Mark Rutland (2): arm64/kvm: sysreg: fix typo'd SYS_ICC_IGRPEN*_EL1 arm64/kvm: vgic: use SYS_DESC() arch/arm64/include/asm/arch_gicv3.h | 2 +- arch/arm64/include/asm/sysreg.h | 12

[PATCH 1/2] arm64/kvm: sysreg: fix typo'd SYS_ICC_IGRPEN*_EL1

Per ARM DDI 0487B.a, the registers are named ICC_IGRPEN*_EL1 rather than ICC_GRPEN*_EL1. Correct our mnemonics and comments to match, before we add more GICv3 register definitions. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc:

[PATCH] arm64/kvm: fix misleading kconfig text for 16K pages

We've supported KVM with 16K pages since commit: 02e0b7600f835007 ("arm64: kvm: Add support for 16K pages") ... yet the kconfig text says this combination is not supported. Let's fix that by deleting the misleading text. Signed-off-by: Mark Rutland <mark.rutl...@arm.com>

Re: [PATCH 07/31] KVM: arm/arm64: vgic-v3: Add accessors for the ICH_APxRn_EL2 registers

On Tue, May 30, 2017 at 05:17:01PM +0100, Marc Zyngier wrote: > On 03/05/17 16:58, Marc Zyngier wrote: > > On 03/05/17 16:32, Mark Rutland wrote: > >> On Wed, May 03, 2017 at 11:45:42AM +0100, Marc Zyngier wrote: > >>> +static void __hyp_text __vgic

Re: [PATCH 08/31] arm64: Add a facility to turn an ESR syndrome into a sysreg encoding

kill, let's add a set of macros that convert an ESR value into > the corresponding sysreg encoding. > > We handle both AArch32 and AArch64, taking advantage of identical > encodings between system registers and CP15 accessors. > > Signed-off-by: Marc Zyngier <marc.zyng...@arm

Re: [PATCH 07/31] KVM: arm/arm64: vgic-v3: Add accessors for the ICH_APxRn_EL2 registers

On Wed, May 03, 2017 at 11:45:42AM +0100, Marc Zyngier wrote: > As we're about to access the Active Priority registers a lot more, > let's define accessors that take the register number as a parameter. > > Signed-off-by: Marc Zyngier > --- > virt/kvm/arm/hyp/vgic-v3-sr.c |

Re: [PATCH v2] arm64: Add ASM modifier for xN register operands

On Fri, Apr 28, 2017 at 11:20:21AM +0100, Ard Biesheuvel wrote: > On 28 April 2017 at 10:53, Mark Rutland <mark.rutl...@arm.com> wrote: > > On Fri, Apr 28, 2017 at 08:18:52AM +0100, Ard Biesheuvel wrote: > >> On 27 April 2017 at 23:52, Matthias Kaehlcke <m...@chromiu

Re: [PATCH v2] arm64: Add ASM modifier for xN register operands

On Fri, Apr 28, 2017 at 08:18:52AM +0100, Ard Biesheuvel wrote: > On 27 April 2017 at 23:52, Matthias Kaehlcke <m...@chromium.org> wrote: > > El Thu, Apr 27, 2017 at 12:02:56PM +0100 Mark Rutland ha dit: > >> On Wed, Apr 26, 2017 at 02:46:16PM -0700, Matthias Kaehlck

Re: [PATCH v2] arm64: Add ASM modifier for xN register operands

Hi, On Wed, Apr 26, 2017 at 02:46:16PM -0700, Matthias Kaehlcke wrote: > Many inline assembly statements don't include the 'x' modifier when > using xN registers as operands. This is perfectly valid, however it > causes clang to raise warnings like this: > > warning: value size does not match

Re: kvm/arm64: use-after-free in kvm_unmap_hva_handler/unmap_stage2_pmds

On Tue, Apr 18, 2017 at 09:32:31AM +0100, Mark Rutland wrote: > Hi Suzuki, > > On Thu, Apr 13, 2017 at 04:50:46PM +0100, Suzuki K. Poulose wrote: > > kvm: Hold reference to the user address space > > > > The core KVM code, uses mmgrab/mmdrop to pin the mm struct

Re: kvm/arm64: use-after-free in kvm_unmap_hva_handler/unmap_stage2_pmds

gt; is fine to do so, as we are doing it from the context of the same process. > > This also prevents the race condition where mmu_notifier_release() could > be called in parallel and one instance could end up using a free'd kvm > instance. > > Cc: Mark Rutland <mark.rutl...@arm

Re: [PATCH v3 7/8] arm64: exception: handle asynchronous SError interrupt

Hi, On Thu, Mar 30, 2017 at 06:31:07PM +0800, Xie XiuQi wrote: > diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h > index f20c64a..22f9c90 100644 > --- a/arch/arm64/include/asm/esr.h > +++ b/arch/arm64/include/asm/esr.h > @@ -106,6 +106,20 @@ > #define ESR_ELx_AR

Re: kvm/arm64: use-after-free in kvm_unmap_hva_handler/unmap_stage2_pmds

On Wed, Apr 12, 2017 at 08:51:31PM +0200, Andrey Konovalov wrote: > On Wed, Apr 12, 2017 at 8:43 PM, Marc Zyngier wrote: > > On 12/04/17 17:19, Andrey Konovalov wrote: > >> I now have a way to reproduce it, so I can test proposed patches. I > >> don't have a simple C

[RFC 9/9] arm64: docs: document pointer authentication

available (e.g. as we expect for FP and other things today). I'm not sure quite what to say, and as it stands this isn't quite correct. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Will Deacon <will.dea...@arm.com> --- D

[RFC 8/9] arm64/kvm: context-switch PAC registers

will need to trap accesses to these to provide santized values. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: kvmarm@lists.cs.columbia.edu --- arch/arm64/include/asm/kvm_emulate.h | 15 +

[RFC 6/9] arm64: add basic pointer authentication support

, APDBKey) are disabled, and will behave as NOPs. These may be made use of in future patches. No support is added for the generic key (APGAKey), though this cannot be trapped or made to behave as a NOP. Its presence is not advertised with a hwcap. Signed-off-by: Mark Rutland <mark.rutl...@arm.com&

[RFC 5/9] arm64: Don't trap host pointer auth use to EL2

HCR_EL2 itself. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: Will Deacon <will.dea...@arm.com> Cc: kvmarm@lists.cs.columbia.e

[RFC 4/9] arm64/cpufeature: detect pointer authentication

So that we can dynamically handle the presence of pointer authentication functionality, wire up probing code in cpufeature.c. Currently, this only detects the presence of an architected algorithm. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@ar

[RFC 1/9] asm-generic: mm_hooks: allow hooks to be overridden individually

, allow each hook to be overridden indiviually, by placing each under an #ifndef block. As architectures providing their own hooks can't include this file today, this shouldn't adversely affect any existing hooks. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Arnd Bergmann <a...@arnd

[RFC 2/9] arm64: add pointer authentication register bits

ESR_ELx.EC code used when the new instructions are affected by configurable traps This patch adds the relevant definitions to and for these, to be used by subsequent patches. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Suzu

[RFC 3/9] arm64/cpufeature: add ARMv8.3 id_aa64isar1 bits

ned-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Suzuki K Poulose <suzuki.poul...@arm.com> Cc: Will Deacon <will.dea...@arm.com> --- arch/arm64/kernel/cpufeature.c | 6 +- 1 file changed, 5 insertions(+), 1 deletion(

[RFC 0/9] ARMv8.3 pointer authentication userspace support

/linux/kernel/git/mark/boot-wrapper-aarch64.git pointer-auth Mark Rutland (9): asm-generic: mm_hooks: allow hooks to be overridden individually arm64: add pointer authentication register bits arm64/cpufeature: add ARMv8.3 id_aa64isar1 bits arm64/cpufeature: detect pointer authentication arm64

Re: [PATCH v3] kvm: arm/arm64: Fix locking for kvm_free_stage2_pgd

.kernel.org # v3.10+ > Cc: Paolo Bonzini <pbon...@redhat.com> > Cc: Marc Zyngier <marc.zyng...@arm.com> > Cc: Christoffer Dall <christoffer.d...@linaro.org> > Cc: Mark Rutland <mark.rutl...@arm.com> > Signed-off-by: Suzuki K Poulose <suzuki.poul...@arm.c

Re: KVM/ARM: sleeping function called from invalid context

On Thu, Mar 30, 2017 at 03:31:12PM +0100, Mark Rutland wrote: > Hi, > > I'm seeing the splat below when running KVM on an arm64 host with > CONFIG_DEBUG_ATOMIC_SLEEP and CONFIG_LOCKDEP enabled. > > I saw this on v4.11-rc1, and I can reproduce the problem on the current >

KVM/ARM: sleeping function called from invalid context

Hi, I'm seeing the splat below when running KVM on an arm64 host with CONFIG_DEBUG_ATOMIC_SLEEP and CONFIG_LOCKDEP enabled. I saw this on v4.11-rc1, and I can reproduce the problem on the current kvmarm master branch (563e2f5daa66fbc1). I've hacked noinlines into arch/arm/kvm/mmu.c in an

Re: [PATCH 00/15] arm64/kvm: use common sysreg definitions

On Wed, Mar 29, 2017 at 09:41:47AM +0100, Will Deacon wrote: > On Tue, Mar 28, 2017 at 10:29:31PM +0200, Christoffer Dall wrote: > > On Tue, Mar 28, 2017 at 07:48:28PM +0100, Mark Rutland wrote: > > > On Wed, Mar 22, 2017 at 06:35:13PM +, Mark Rutland wrote: > > >

Re: [PATCH 00/15] arm64/kvm: use common sysreg definitions

On Wed, Mar 22, 2017 at 06:35:13PM +, Mark Rutland wrote: > On Fri, Mar 10, 2017 at 06:35:55PM +, Will Deacon wrote: > > On Fri, Mar 10, 2017 at 08:17:22AM +, Marc Zyngier wrote: > > > > The next question is how do we merge this. Obviously, we can't split i

Re: [PATCH V8 1/3] irq: Add flags to request_percpu_irq function

Hi Daniel, On Thu, Mar 23, 2017 at 06:42:01PM +0100, Daniel Lezcano wrote: > In the next changes, we track the interrupts but we discard the timers as > that does not make sense. The next interrupt on a timer is predictable. Sorry, but I could not parse this. [...] > diff --git

Re: [PATCH 00/15] arm64/kvm: use common sysreg definitions

Hi, On Fri, Mar 10, 2017 at 06:35:55PM +, Will Deacon wrote: > On Fri, Mar 10, 2017 at 08:17:22AM +, Marc Zyngier wrote: > > The next question is how do we merge this. Obviously, we can't split it > > between trees, and this is very likely to clash with anything that we > > will merge on

Re: [PATCH RFC 6/7] ARM64: KVM: Support heterogeneous system

On Wed, Mar 15, 2017 at 03:06:33PM +0100, Andrew Jones wrote: > On Wed, Mar 15, 2017 at 02:36:45PM +0100, Christoffer Dall wrote: > > > If QEMU wants to know > > > whether or not the host it's running on is heterogeneous, then > > > it can just query sysfs, rather than ask KVM. > > > > > > > Can

Re: [PATCH 00/15] arm64/kvm: use common sysreg definitions

On Fri, Mar 10, 2017 at 06:35:55PM +, Will Deacon wrote: > On Fri, Mar 10, 2017 at 08:17:22AM +, Marc Zyngier wrote: > > On Thu, Mar 09 2017 at 5:07:12 pm GMT, Mark Rutland <mark.rutl...@arm.com> > > wrote: > > The next question is how do we merge this

Re: [PATCH v5 10/10] arm64: mm: set the contiguous bit for kernel mappings where appropriate

On Thu, Mar 09, 2017 at 09:25:12AM +0100, Ard Biesheuvel wrote: > +static inline u64 pte_cont_addr_end(u64 addr, u64 end) > +{ > + return min((addr + CONT_PTE_SIZE) & CONT_PTE_MASK, end); > +} > + > +static inline u64 pmd_cont_addr_end(u64 addr, u64 end) > +{ > + return min((addr +

Re: [PATCH v5 09/10] arm64/mmu: replace 'page_mappings_only' parameter with flags argument

ing() without exposing those more generally, this also looks fine. FWIW: Reviewed-by: Mark Rutland <mark.rutl...@arm.com> Mark. ___ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

Re: [PATCH v5 08/10] arm64/mmu: add contiguous bit to sanity bug check

> > Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> Reviewed-by: Mark Rutland <mark.rutl...@arm.com> Strictly speaking, I think this is marginally more stringent than what the ARM ARM describes. My reading is that the "Misprogramming of the Contiguous bit"

Re: [PATCH v5 07/10] arm64/mmu: ignore debug_pagealloc for kernel segments

lloc(), and never mandate page mappings. Regardless: Reviewed-by: Mark Rutland <mark.rutl...@arm.com> Mark. > --- > arch/arm64/mm/mmu.c | 7 +++ > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c > index c3963c592ec

[PATCH 02/15] arm64: sysreg: add debug system registers

This patch adds sysreg definitions for system registers in the debug and trace system register encoding space. Subsequent patches will make use of these definitions. The encodings were taken from ARM DDI 0487A.k_iss10775, Table C5-5. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: C

[PATCH 10/15] KVM: arm64: Use common performance monitor sysreg definitions

is applied to bring these into line with the usual comment style. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: kvmarm@lists.cs.columbia.edu --- arch/arm64/k

[PATCH 06/15] arm64: sysreg: add register encodings used by KVM

are only made for registers used today by KVM. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: Suzuki K Poulose <suzuki.poul...@arm.com> Cc: Will Deacon <will.dea...@arm.com&g

[PATCH 15/15] KVM: arm64: Use common Set/Way sys definitions

Now that we have common definitions for the encoding of Set/Way cache maintenance operations, make the KVM code use these, simplifying the sys_reg_descs table. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc: Marc Zyngie

[PATCH 03/15] arm64: sysreg: add performance monitor registers

document. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: Suzuki K Poulose <suzuki.poul...@arm.com> Cc: Will Deacon <will.dea...@arm.com> --- arch/arm64/include/asm/sysreg.h | 2

[PATCH 12/15] KVM: arm64: Use common physical timer sysreg definitions

Now that we have common definitions for the physical timer control registers, make the KVM code use these, simplifying the sys_reg_descs table. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc: Marc Zyngier <marc.zyng...@arm.

[PATCH 14/15] KVM: arm64: Use common sysreg definitions

Now that we have common definitions for the remaining register encodings required by KVM, make the KVM code use these, simplifying the sys_reg_descs table and the genericv8_sys_regs table. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linar

[PATCH 08/15] KVM: arm64: add SYS_DESC()

This patch adds a macro enabling us to initialise sys_reg_desc structures based on common sysreg encoding definitions in . Subsequent patches will use this to simplify the KVM code. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org&

[PATCH 13/15] KVM: arm64: use common invariant sysreg definitions

Now that we have common definitions for the register encodings used by KVM, make the KVM code uses thse for invariant sysreg definitions. This makes said definitions a reasonable amount shorter, especially as many comments are rendered redundant and can be removed. Signed-off-by: Mark Rutland

[PATCH 09/15] KVM: arm64: Use common debug sysreg definitions

-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: kvmarm@lists.cs.columbia.edu --- arch/arm64/kvm/sys_regs.c | 73 ++- 1 file changed, 21 insertion

[PATCH 07/15] arm64: sysreg: add Set/Way sys encodings

registers, and to allow us to change the way these are handled in future, a new sys_insn() alias for sys_reg() is added and used for these new definitions. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Marc Zyngier <marc.zyng...@arm.

[PATCH 11/15] KVM: arm64: Use common GICv3 sysreg definitions

Now that we have common definitions for the GICv3 register encodings, make the KVM code use these, simplifying the sys_reg_descs table. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc: Marc Zyngier <marc.zyng...@arm.

[PATCH 01/15] arm64: sysreg: sort by encoding

conflicts. This patch enforces this order, by moving the few items that break it. There should be no functional change. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: Suzuki K Poulose <s

[PATCH 05/15] arm64: sysreg: add physical timer registers

This patch adds sysreg definitions for system registers used to control the architected physical timer. Subsequent patches will make use of these definitions. The encodings were taken from ARM DDI 0487A.k_iss10775, Table C5-6. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: C

[PATCH 04/15] arm64: sysreg: subsume GICv3 sysreg definitions

moves the definitions to , adding a SYS_ prefix, and sorting the registers per their encoding. Existing users of the definitions are fixed up so that this change is not problematic. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Catalin Marinas <catalin.mari...@arm.com> Cc:

[PATCH 00/15] arm64/kvm: use common sysreg definitions

the physical counter registers. * Verified section differences again. Thanks, Mark. [1] git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git arm64/common-sysreg [2] http://lists.infradead.org/pipermail/linux-arm-kernel/2017-January/484693.html Mark Rutland (15): arm64: sysreg: sort

Re: [PATCH v5 06/10] arm64/mmu: align alloc_init_pte prototype with pmd/pud versions

e(pte, pfn_pte(pfn, prot)); > - pfn++; > + set_pte(pte, pfn_pte(__phys_to_pfn(phys), prot)); > + phys += PAGE_SIZE; Minor nit: so as to align the strucutre of the loop with the other functions, it'd be nice to have this on the f

Re: [PATCH RFC 7/7] ARM64: KVM: Add user set handler for id_aa64mmfr0_el1

On Thu, Mar 09, 2017 at 04:52:18AM -0800, Christoffer Dall wrote: > On Mon, Jan 16, 2017 at 05:33:34PM +0800, Shannon Zhao wrote: > > From: Shannon Zhao > > > > Check if the configuration is fine. > > This commit message really needs some love and attention. > > > > >

Re: [PATCH v4 6/6] arm64: mm: set the contiguous bit for kernel mappings where appropriate

On Wed, Mar 08, 2017 at 11:57:22AM +0100, Ard Biesheuvel wrote: > On 7 March 2017 at 17:46, Mark Rutland <mark.rutl...@arm.com> wrote: > > Note that I've cheated and made alloc_init_pte() take a phys_addr_t > > rather than a pfn, which I think we should do anyhow for co

Re: [PATCH v4 6/6] arm64: mm: set the contiguous bit for kernel mappings where appropriate

Hi, On Sat, Mar 04, 2017 at 02:30:48PM +, Ard Biesheuvel wrote: > This is the third attempt at enabling the use of contiguous hints for > kernel mappings. The most recent attempt 0bfc445dec9d was reverted after > it turned out that updating permission attributes on live contiguous ranges >

Re: [PATCH v4 5/6] arm64: mmu: apply strict permissions to .init.text and .init.data

ap_kernel_segment(pgd, __start_rodata, __inittext_begin, PAGE_KERNEL, > +_rodata); > + map_kernel_segment(pgd, __inittext_begin, __inittext_end, text_prot, > +_inittext); > + map_kernel_segment(pgd, __initdata_begin, __initdata_end, PAGE_KER

Re: [PATCH v4 4/6] arm64: mmu: map .text as read-only from the outset

el_segment(pgd, _text, _etext, PAGE_KERNEL_EXEC, _text); > + pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : > PAGE_KERNEL_EXEC; > + It might be worth having a comment as to why, e.g. /* * External debuggers may need to write directly to the text

Re: [PATCH 1/2] arm/kvm: survive unknown traps from guests

On Mon, Mar 06, 2017 at 07:08:03AM -0800, Christoffer Dall wrote: > On Mon, Feb 20, 2017 at 12:30:11PM +0000, Mark Rutland wrote: > > static exit_handle_fn arm_exit_handlers[] = { > > + [0 ... HSR_EC_MAX] = kvm_handle_unknown_ec, > > Cool stuff, didn't know y

Re: [RFC PATCH 00/13] arm64/kvm: use common sysreg definitions

On Fri, Feb 24, 2017 at 11:16:50AM +0100, Christoffer Dall wrote: > Hi Mark, > > On Tue, Jan 31, 2017 at 06:05:38PM +0000, Mark Rutland wrote: > > Whenever we add new functionality involving new system registers, we need to > > add sys_reg() definitions so that we can

Re: A question about TTBRs

On Fri, Feb 24, 2017 at 11:22:40AM +0100, Christoffer Dall wrote: > On Fri, Feb 24, 2017 at 09:55:09AM +, Raz wrote: > > Hello > > I am reading the arm8a book. According to the documentation the output > > address of each level 3 entry in TTBRx_EL1points to an address in the > > physical

Re: [PATCH 2/2] arm64/kvm: survive unknown traps from guests

On Mon, Feb 20, 2017 at 01:48:32PM +, Suzuki K Poulose wrote: > On 20/02/17 12:30, Mark Rutland wrote: > >The patch makes KVM handle any unknown EC by injecting an UNDEFINED > >exception into the guest, with a corresponding (ratelimited) warning in > >the host dmesg. W

[PATCH 0/2] arm{,64}/kvm: survive unknown traps from guests

fallout to the guest, rather than allowing guests to potentially bring down the host. These patches try to make arm/arm64 KVM robust in these cases. Thanks, Mark. Mark Rutland (2): arm/kvm: survive unknown traps from guests arm64/kvm: survive unknown traps from guests arch/arm/include/asm

[PATCH 2/2] arm64/kvm: survive unknown traps from guests

userspace. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc: Dave Martin <dave.mar...@arm.com> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: Suzuki K Poulose <suzuki.poul...@arm.com> --- arch/arm64/kvm/handle_exit

Re: [PATCH v2 4/5] arm64: mmu: map .text as read-only from the outset

On Tue, Feb 14, 2017 at 05:49:19PM +, Ard Biesheuvel wrote: > > > On 14 Feb 2017, at 17:40, Mark Rutland <mark.rutl...@arm.com> wrote: > > > >> On Tue, Feb 14, 2017 at 04:15:11PM +, Ard Biesheuvel wrote: > >> Having trivial 'off' switches for secu

Re: [PATCH v2 5/5] arm64: mmu: apply strict permissions to .init.text and .init.data

On Sat, Feb 11, 2017 at 08:23:06PM +, Ard Biesheuvel wrote: > To avoid having mappings that are writable and executable at the same > time, split the init region into a .init.text region that is mapped > read-only, and a .init.data region that is mapped non-executable. > > This is possible

Re: [PATCH v2 4/5] arm64: mmu: map .text as read-only from the outset

On Sat, Feb 11, 2017 at 08:23:05PM +, Ard Biesheuvel wrote: > Now that alternatives patching code no longer relies on the primary > mapping of .text being writable, we can remove the code that removes > the writable permissions post-init time, and map it read-only from > the outset. > >

Re: [PATCH v2 3/5] arm64: alternatives: apply boot time fixups via the linear mapping

near alias of .text with RW- permissions > initially, and remove the write permissions as soon as alternative > patching has completed. > > Reviewed-by: Laura Abbott <labb...@redhat.com> > Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org> Reviewed-by: Mark

Re: [PATCH v2 2/5] arm64: mmu: move TLB maintenance from callers to create_mapping_late()

ate*_mapping_late. Given the only users of this are changing permissions, perhaps we should rename this to change_mapping_prot(), or something like that? Otherwise, this looks fine to me, and boots fine. Either way: Reviewed-by: Mark Rutland <mark.rutl...@arm.com> Tested-by: Mark Rutland <mark

[RFC PATCH 11/13] arm64: kvm: use common invariant sysreg definitions

Now that we have common definitions for the register encodings used by KVM, make the KVM code uses thse for invariant sysreg definitions. This makes said definitions a reasonable amount shorter, especially as many comments are rendered redundant and can be removed. Signed-off-by: Mark Rutland

[RFC PATCH 13/13] arm64: kvm: Use common Set/Way sys definitions

Now that we have common definitions for the encoding of Set/Way cache maintenance operations, make the KVM code use these, simplifying the sys_reg_descs table. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc: Marc Zyngie

[RFC PATCH 09/13] arm64: kvm: Use common performance monitor sysreg definitions

is applied to bring these into line with the usual comment style. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc: Marc Zyngier <marc.zyng...@arm.com> Cc: kvmarm@lists.cs.columbia.edu --- arch/arm64/k

[RFC PATCH 10/13] arm64: kvm: Use common GICv3 sysreg definitions

Now that we have common definitions for the GICv3 register encodings, make the KVM code use these, simplifying the sys_reg_descs table. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linaro.org> Cc: Marc Zyngier <marc.zyng...@arm.

[RFC PATCH 12/13] arm64: kvm: Use common sysreg definitions

Now that we have common definitions for the remaining register encodings required by KVM, make the KVM code use these, simplifying the sys_reg_descs table and the genericv8_sys_regs table. Signed-off-by: Mark Rutland <mark.rutl...@arm.com> Cc: Christoffer Dall <christoffer.d...@linar

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