On 12/12/2019 10:01 PM, Mark Rutland wrote:
> On Thu, Dec 12, 2019 at 03:22:13PM +, Suzuki Kuruppassery Poulose wrote:
>> On 12/12/2019 14:46, Mark Rutland wrote:
>>> On Thu, Dec 12, 2019 at 03:44:23PM +0530, Anshuman Khandual wrote:
+#define ID_ISAR6_JSCVT_SHIFT 0
+#defi
On 12/12/2019 08:52 PM, Suzuki Kuruppassery Poulose wrote:
> On 12/12/2019 14:46, Mark Rutland wrote:
>> On Thu, Dec 12, 2019 at 03:44:23PM +0530, Anshuman Khandual wrote:
>>> +#define ID_ISAR6_JSCVT_SHIFT 0
>>> +#define ID_ISAR6_DP_SHIFT 4
>>> +#define ID_ISAR6_FHM_SHIFT 8
>
On 12/12/2019 05:13 PM, Marc Zyngier wrote:
> On 2019-12-12 10:14, Anshuman Khandual wrote:
>> This adds basic building blocks required for ISAR6 CPU ID register which
>> identifies support for various instruction implementation on AArch32 state.
>
> nit: the register name is ID_ISAR6.
Sure, wi
On Thu, Dec 12, 2019 at 03:22:13PM +, Suzuki Kuruppassery Poulose wrote:
> On 12/12/2019 14:46, Mark Rutland wrote:
> > On Thu, Dec 12, 2019 at 03:44:23PM +0530, Anshuman Khandual wrote:
> > > +#define ID_ISAR6_JSCVT_SHIFT 0
> > > +#define ID_ISAR6_DP_SHIFT4
> > > +#
On 12/12/2019 14:46, Mark Rutland wrote:
On Thu, Dec 12, 2019 at 03:44:23PM +0530, Anshuman Khandual wrote:
+#define ID_ISAR6_JSCVT_SHIFT 0
+#define ID_ISAR6_DP_SHIFT 4
+#define ID_ISAR6_FHM_SHIFT 8
+#define ID_ISAR6_SB_SHIFT 12
+#define ID_ISAR6_S
On Thu, Dec 12, 2019 at 03:44:23PM +0530, Anshuman Khandual wrote:
> +#define ID_ISAR6_JSCVT_SHIFT 0
> +#define ID_ISAR6_DP_SHIFT4
> +#define ID_ISAR6_FHM_SHIFT 8
> +#define ID_ISAR6_SB_SHIFT12
> +#define ID_ISAR6_SPECRES_SHIFT 16
> +#define I
On 2019-12-12 10:14, Anshuman Khandual wrote:
This adds basic building blocks required for ISAR6 CPU ID register
which
identifies support for various instruction implementation on AArch32
state.
nit: the register name is ID_ISAR6.
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Marc Zyngier
Cc:
This adds basic building blocks required for ISAR6 CPU ID register which
identifies support for various instruction implementation on AArch32 state.
Cc: Catalin Marinas
Cc: Will Deacon
Cc: Marc Zyngier
Cc: James Morse
Cc: Suzuki K Poulose
Cc: Mark Rutland
Cc: linux-ker...@vger.kernel.org
Cc: