Re: [PATCH 1/9] KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode

2022-10-27 Thread Marc Zyngier
Hi Reiji, On 2022-10-27 15:33, Reiji Watanabe wrote: Hi Marc, > > +static void kvm_pmu_counter_increment(struct kvm_vcpu *vcpu, > > + unsigned long mask, u32 event) > > +{ > > + int i; > > + > > + if (!kvm_vcpu_has_pmu(vcpu)) > > +

Re: [PATCH 1/9] KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode

2022-10-27 Thread Reiji Watanabe
Hi Marc, > > > +static void kvm_pmu_counter_increment(struct kvm_vcpu *vcpu, > > > + unsigned long mask, u32 event) > > > +{ > > > + int i; > > > + > > > + if (!kvm_vcpu_has_pmu(vcpu)) > > > + return; > > > + > > > + if (!(__vcpu_

Re: [PATCH 1/9] KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode

2022-10-24 Thread Marc Zyngier
Hi Reiji, Catching up on this. On Tue, 23 Aug 2022 05:30:21 +0100, Reiji Watanabe wrote: > > Hi Marc, > > On Fri, Aug 5, 2022 at 6:58 AM Marc Zyngier wrote: > > > > Ricardo recently pointed out that the PMU chained counter emulation > > in KVM wasn't quite behaving like the one on actual hard

Re: [PATCH 1/9] KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode

2022-08-10 Thread Oliver Upton
Hi Marc, On Fri, Aug 05, 2022 at 02:58:05PM +0100, Marc Zyngier wrote: > Ricardo recently pointed out that the PMU chained counter emulation > in KVM wasn't quite behaving like the one on actual hardware, in > the sense that a chained counter would expose an overflow on > both halves of a chained

[PATCH 1/9] KVM: arm64: PMU: Align chained counter implementation with architecture pseudocode

2022-08-05 Thread Marc Zyngier
Ricardo recently pointed out that the PMU chained counter emulation in KVM wasn't quite behaving like the one on actual hardware, in the sense that a chained counter would expose an overflow on both halves of a chained counter, while KVM would only expose the overflow on the top half. The differen