On Tue, Jun 23, 2020 at 11:46:37AM -0700, Florian Fainelli wrote:
> On 6/11/20 9:42 PM, Florian Fainelli wrote:
> > From: Will Deacon
> >
> > commit 679db70801da9fda91d26caf13bf5b5ccc74e8e8 upstream
> >
> > Some CPUs can speculate past an ERET instruction and potentially perform
> > speculative
On 6/11/20 9:42 PM, Florian Fainelli wrote:
> From: Will Deacon
>
> commit 679db70801da9fda91d26caf13bf5b5ccc74e8e8 upstream
>
> Some CPUs can speculate past an ERET instruction and potentially perform
> speculative accesses to memory before processing the exception return.
> Since the register
From: Will Deacon
commit 679db70801da9fda91d26caf13bf5b5ccc74e8e8 upstream
Some CPUs can speculate past an ERET instruction and potentially perform
speculative accesses to memory before processing the exception return.
Since the register state is often controlled by a lower privilege level
at