On 06/10/2015 06:40 PM, Marc Zyngier wrote:
On 05/06/15 09:37, Andre Przywara wrote:
The code currently is assuming fixed sized memory regions for the
distributor and CPU interface. GICv3 needs a dynamic allocation of
its redistributor region, since its size depends on the number of
vCPUs.
On 15/06/15 12:12, Andre Przywara wrote:
On 06/10/2015 06:40 PM, Marc Zyngier wrote:
On 05/06/15 09:37, Andre Przywara wrote:
The code currently is assuming fixed sized memory regions for the
distributor and CPU interface. GICv3 needs a dynamic allocation of
its redistributor region, since
On 05/06/15 09:37, Andre Przywara wrote:
The code currently is assuming fixed sized memory regions for the
distributor and CPU interface. GICv3 needs a dynamic allocation of
its redistributor region, since its size depends on the number of
vCPUs.
Also add the necessary code to create a GICv3
The code currently is assuming fixed sized memory regions for the
distributor and CPU interface. GICv3 needs a dynamic allocation of
its redistributor region, since its size depends on the number of
vCPUs.
Also add the necessary code to create a GICv3 IRQ chip instance.
This contains some defines
