Re: [PATCH v3 25/55] KVM: arm/arm64: vgic-new: Add PENDING registers handlers

2016-05-11 Thread Christoffer Dall
On Fri, May 06, 2016 at 11:45:38AM +0100, Andre Przywara wrote: > The pending register handlers are shared between the v2 and v3 > emulation, so their implementation goes into vgic-mmio.c, to be easily > referenced from the v3 emulation as well later. > For level triggered interrupts the real line

Re: [PATCH v3 25/55] KVM: arm/arm64: vgic-new: Add PENDING registers handlers

2016-05-10 Thread Marc Zyngier
On 06/05/16 11:45, Andre Przywara wrote: > The pending register handlers are shared between the v2 and v3 > emulation, so their implementation goes into vgic-mmio.c, to be easily > referenced from the v3 emulation as well later. > For level triggered interrupts the real line level is unaffected by

[PATCH v3 25/55] KVM: arm/arm64: vgic-new: Add PENDING registers handlers

2016-05-06 Thread Andre Przywara
The pending register handlers are shared between the v2 and v3 emulation, so their implementation goes into vgic-mmio.c, to be easily referenced from the v3 emulation as well later. For level triggered interrupts the real line level is unaffected by this write, so we keep this state separate and co