Re: [PATCH v4 15/21] KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2.

2017-10-31 Thread Marc Zyngier
On Thu, Oct 19 2017 at 4:58:01 pm BST, James Morse wrote: > Prior to v8.2's RAS Extensions, the HCR_EL2.VSE 'virtual SError' feature > generated an SError with an implementation defined ESR_EL1.ISS, because we > had no mechanism to specify the ESR value. > > On Juno this

Re: [PATCH v4 15/21] KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2.

2017-10-30 Thread Christoffer Dall
On Mon, Oct 30, 2017 at 03:44:17PM +, James Morse wrote: > Hi Christoffer, > > On 30/10/17 10:51, Christoffer Dall wrote: > > On Mon, Oct 30, 2017 at 08:59:51AM +0100, Christoffer Dall wrote: > >> On Thu, Oct 19, 2017 at 03:58:01PM +0100, James Morse wrote: > >>> Prior to v8.2's RAS

Re: [PATCH v4 15/21] KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2.

2017-10-30 Thread James Morse
Hi Christoffer, On 30/10/17 10:51, Christoffer Dall wrote: > On Mon, Oct 30, 2017 at 08:59:51AM +0100, Christoffer Dall wrote: >> On Thu, Oct 19, 2017 at 03:58:01PM +0100, James Morse wrote: >>> Prior to v8.2's RAS Extensions, the HCR_EL2.VSE 'virtual SError' feature >>> generated an SError with

Re: [PATCH v4 15/21] KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2.

2017-10-30 Thread Christoffer Dall
On Mon, Oct 30, 2017 at 08:59:51AM +0100, Christoffer Dall wrote: > On Thu, Oct 19, 2017 at 03:58:01PM +0100, James Morse wrote: > > Prior to v8.2's RAS Extensions, the HCR_EL2.VSE 'virtual SError' feature > > generated an SError with an implementation defined ESR_EL1.ISS, because we > > had no

Re: [PATCH v4 15/21] KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2.

2017-10-30 Thread Christoffer Dall
On Thu, Oct 19, 2017 at 03:58:01PM +0100, James Morse wrote: > Prior to v8.2's RAS Extensions, the HCR_EL2.VSE 'virtual SError' feature > generated an SError with an implementation defined ESR_EL1.ISS, because we > had no mechanism to specify the ESR value. > > On Juno this generates an all-zero

Re: [PATCH v4 15/21] KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2.

2017-10-24 Thread gengdongjiu
Hi James, On 2017/10/23 23:26, James Morse wrote: > If you're suggesting Qemu should set a default 'unknown' ESR for use when KVM > doesn't know what to do, and SError is pretty much its only option: > > Why would Qemu set anything other than impdef:all-zeros? > > The only use would be to fake

Re: [PATCH v4 15/21] KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2.

2017-10-23 Thread James Morse
Hi gengdongjiu, On 20/10/17 17:44, gengdongjiu wrote: > 2017-10-19 22:58 GMT+08:00 James Morse : >> Prior to v8.2's RAS Extensions, the HCR_EL2.VSE 'virtual SError' feature >> generated an SError with an implementation defined ESR_EL1.ISS, because we >> had no mechanism to

Re: [PATCH v4 15/21] KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2.

2017-10-20 Thread gengdongjiu
2017-10-19 22:58 GMT+08:00 James Morse : > Prior to v8.2's RAS Extensions, the HCR_EL2.VSE 'virtual SError' feature > generated an SError with an implementation defined ESR_EL1.ISS, because we > had no mechanism to specify the ESR value. > > On Juno this generates an all-zero

[PATCH v4 15/21] KVM: arm64: Set an impdef ESR for Virtual-SError using VSESR_EL2.

2017-10-19 Thread James Morse
Prior to v8.2's RAS Extensions, the HCR_EL2.VSE 'virtual SError' feature generated an SError with an implementation defined ESR_EL1.ISS, because we had no mechanism to specify the ESR value. On Juno this generates an all-zero ESR, the most significant bit 'ISV' is clear indicating the remainder