On Fri, Oct 12, 2018 at 09:56:05AM +0100, Will Deacon wrote:
> On Fri, Oct 12, 2018 at 09:53:54AM +0100, Mark Rutland wrote:
> > On Thu, Oct 11, 2018 at 05:28:14PM +0100, Will Deacon wrote:
> > > On Fri, Oct 05, 2018 at 09:47:38AM +0100, Kristina Martsenko wrote:
> >
> > > > +#define
On Fri, Oct 12, 2018 at 09:53:54AM +0100, Mark Rutland wrote:
> On Thu, Oct 11, 2018 at 05:28:14PM +0100, Will Deacon wrote:
> > On Fri, Oct 05, 2018 at 09:47:38AM +0100, Kristina Martsenko wrote:
>
> > > +#define ESR_ELx_EC_PAC (0x09)
> >
> > Really minor nit: but shouldn't this be
On Thu, Oct 11, 2018 at 05:28:14PM +0100, Will Deacon wrote:
> On Fri, Oct 05, 2018 at 09:47:38AM +0100, Kristina Martsenko wrote:
> > +#define ESR_ELx_EC_PAC (0x09)
>
> Really minor nit: but shouldn't this be ESR_EL2_EC_PAC, since this trap
> can't occur at EL1 afaict?
It can also
On Fri, Oct 05, 2018 at 09:47:38AM +0100, Kristina Martsenko wrote:
> From: Mark Rutland
>
> The ARMv8.3 pointer authentication extension adds:
>
> * New fields in ID_AA64ISAR1 to report the presence of pointer
> authentication functionality.
>
> * New control bits in SCTLR_ELx to enable
From: Mark Rutland
The ARMv8.3 pointer authentication extension adds:
* New fields in ID_AA64ISAR1 to report the presence of pointer
authentication functionality.
* New control bits in SCTLR_ELx to enable this functionality.
* New system registers to hold the keys necessary for this
