From: Abbott Liu <liuwenli...@huawei.com>

The purpose of this patch is to provide set_ttbr0/get_ttbr0 to
kasan_init function. This makes use of the CP15 definitions added in the
previous patch.

Cc: Andrey Ryabinin <aryabi...@virtuozzo.com>
Reported-by: Marc Zyngier <marc.zyng...@arm.com>
Tested-by: Linus Walleij <linus.wall...@linaro.org>
Signed-off-by: Abbott Liu <liuwenli...@huawei.com>
Signed-off-by: Florian Fainelli <f.faine...@gmail.com>
---
 arch/arm/include/asm/cp15.h | 50 +++++++++++++++++++++++++++++++++++++
 arch/arm/kvm/hyp/cp15-sr.c  | 12 ++++-----
 arch/arm/kvm/hyp/switch.c   |  6 ++---
 3 files changed, 59 insertions(+), 9 deletions(-)

diff --git a/arch/arm/include/asm/cp15.h b/arch/arm/include/asm/cp15.h
index 89b6663f2863..0bd8287b39fa 100644
--- a/arch/arm/include/asm/cp15.h
+++ b/arch/arm/include/asm/cp15.h
@@ -42,6 +42,8 @@
 
 #ifndef __ASSEMBLY__
 
+#include <linux/stringify.h>
+
 #if __LINUX_ARM_ARCH__ >= 4
 #define vectors_high() (get_cr() & CR_V)
 #else
@@ -129,6 +131,54 @@
 
 extern unsigned long cr_alignment;     /* defined in entry-armv.S */
 
+static inline void set_par(u64 val)
+{
+       if (IS_ENABLED(CONFIG_ARM_LPAE))
+               write_sysreg(val, PAR_64);
+       else
+               write_sysreg(val, PAR_32);
+}
+
+static inline u64 get_par(void)
+{
+       if (IS_ENABLED(CONFIG_ARM_LPAE))
+               return read_sysreg(PAR_64);
+       else
+               return read_sysreg(PAR_32);
+}
+
+static inline void set_ttbr0(u64 val)
+{
+       if (IS_ENABLED(CONFIG_ARM_LPAE))
+               write_sysreg(val, TTBR0_64);
+       else
+               write_sysreg(val, TTBR0_32);
+}
+
+static inline u64 get_ttbr0(void)
+{
+       if (IS_ENABLED(CONFIG_ARM_LPAE))
+               return read_sysreg(TTBR0_64);
+       else
+               return read_sysreg(TTBR0_32);
+}
+
+static inline void set_ttbr1(u64 val)
+{
+       if (IS_ENABLED(CONFIG_ARM_LPAE))
+               write_sysreg(val, TTBR1_64);
+       else
+               write_sysreg(val, TTBR1_32);
+}
+
+static inline u64 get_ttbr1(void)
+{
+       if (IS_ENABLED(CONFIG_ARM_LPAE))
+               return read_sysreg(TTBR1_64);
+       else
+               return read_sysreg(TTBR1_32);
+}
+
 static inline unsigned long get_cr(void)
 {
        unsigned long val;
diff --git a/arch/arm/kvm/hyp/cp15-sr.c b/arch/arm/kvm/hyp/cp15-sr.c
index e6923306f698..b2b9bb0a08b8 100644
--- a/arch/arm/kvm/hyp/cp15-sr.c
+++ b/arch/arm/kvm/hyp/cp15-sr.c
@@ -19,8 +19,8 @@ void __hyp_text __sysreg_save_state(struct kvm_cpu_context 
*ctxt)
        ctxt->cp15[c0_CSSELR]           = read_sysreg(CSSELR);
        ctxt->cp15[c1_SCTLR]            = read_sysreg(SCTLR);
        ctxt->cp15[c1_CPACR]            = read_sysreg(CPACR);
-       *cp15_64(ctxt, c2_TTBR0)        = read_sysreg(TTBR0);
-       *cp15_64(ctxt, c2_TTBR1)        = read_sysreg(TTBR1);
+       *cp15_64(ctxt, c2_TTBR0)        = read_sysreg(TTBR0_64);
+       *cp15_64(ctxt, c2_TTBR1)        = read_sysreg(TTBR1_64);
        ctxt->cp15[c2_TTBCR]            = read_sysreg(TTBCR);
        ctxt->cp15[c3_DACR]             = read_sysreg(DACR);
        ctxt->cp15[c5_DFSR]             = read_sysreg(DFSR);
@@ -29,7 +29,7 @@ void __hyp_text __sysreg_save_state(struct kvm_cpu_context 
*ctxt)
        ctxt->cp15[c5_AIFSR]            = read_sysreg(AIFSR);
        ctxt->cp15[c6_DFAR]             = read_sysreg(DFAR);
        ctxt->cp15[c6_IFAR]             = read_sysreg(IFAR);
-       *cp15_64(ctxt, c7_PAR)          = read_sysreg(PAR);
+       *cp15_64(ctxt, c7_PAR)          = read_sysreg(PAR_64);
        ctxt->cp15[c10_PRRR]            = read_sysreg(PRRR);
        ctxt->cp15[c10_NMRR]            = read_sysreg(NMRR);
        ctxt->cp15[c10_AMAIR0]          = read_sysreg(AMAIR0);
@@ -48,8 +48,8 @@ void __hyp_text __sysreg_restore_state(struct kvm_cpu_context 
*ctxt)
        write_sysreg(ctxt->cp15[c0_CSSELR],     CSSELR);
        write_sysreg(ctxt->cp15[c1_SCTLR],      SCTLR);
        write_sysreg(ctxt->cp15[c1_CPACR],      CPACR);
-       write_sysreg(*cp15_64(ctxt, c2_TTBR0),  TTBR0);
-       write_sysreg(*cp15_64(ctxt, c2_TTBR1),  TTBR1);
+       write_sysreg(*cp15_64(ctxt, c2_TTBR0),  TTBR0_64);
+       write_sysreg(*cp15_64(ctxt, c2_TTBR1),  TTBR1_64);
        write_sysreg(ctxt->cp15[c2_TTBCR],      TTBCR);
        write_sysreg(ctxt->cp15[c3_DACR],       DACR);
        write_sysreg(ctxt->cp15[c5_DFSR],       DFSR);
@@ -58,7 +58,7 @@ void __hyp_text __sysreg_restore_state(struct kvm_cpu_context 
*ctxt)
        write_sysreg(ctxt->cp15[c5_AIFSR],      AIFSR);
        write_sysreg(ctxt->cp15[c6_DFAR],       DFAR);
        write_sysreg(ctxt->cp15[c6_IFAR],       IFAR);
-       write_sysreg(*cp15_64(ctxt, c7_PAR),    PAR);
+       write_sysreg(*cp15_64(ctxt, c7_PAR),    PAR_64);
        write_sysreg(ctxt->cp15[c10_PRRR],      PRRR);
        write_sysreg(ctxt->cp15[c10_NMRR],      NMRR);
        write_sysreg(ctxt->cp15[c10_AMAIR0],    AMAIR0);
diff --git a/arch/arm/kvm/hyp/switch.c b/arch/arm/kvm/hyp/switch.c
index 1efeef3fd0ee..581277ef44d3 100644
--- a/arch/arm/kvm/hyp/switch.c
+++ b/arch/arm/kvm/hyp/switch.c
@@ -123,12 +123,12 @@ static bool __hyp_text __populate_fault_info(struct 
kvm_vcpu *vcpu)
        if (!(hsr & HSR_DABT_S1PTW) && (hsr & HSR_FSC_TYPE) == FSC_PERM) {
                u64 par, tmp;
 
-               par = read_sysreg(PAR);
+               par = read_sysreg(PAR_64);
                write_sysreg(far, ATS1CPR);
                isb();
 
-               tmp = read_sysreg(PAR);
-               write_sysreg(par, PAR);
+               tmp = read_sysreg(PAR_64);
+               write_sysreg(par, PAR_64);
 
                if (unlikely(tmp & 1))
                        return false; /* Translation failed, back to guest */
-- 
2.17.1

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