Re: [PATCH v8 3/9] KVM: arm/arm64: Don't cache the timer IRQ level

2017-12-19 Thread Christoffer Dall
On Tue, Dec 19, 2017 at 02:17:38PM +, Julien Thierry wrote: > Hi Christoffer, > > A few nits in the commit message. > > On 13/12/17 10:45, Christoffer Dall wrote: > >The timer was modeled after a strict idea of modelling an interrupt line > > nit: modelling (also, modeled after a strict idea

Re: [PATCH v8 3/9] KVM: arm/arm64: Don't cache the timer IRQ level

2017-12-19 Thread Julien Thierry
Hi Christoffer, A few nits in the commit message. On 13/12/17 10:45, Christoffer Dall wrote: The timer was modeled after a strict idea of modelling an interrupt line nit: modelling (also, modeled after a strict idea of modelling?) level in software, meaning that only transitions in the leve

Re: [PATCH v8 3/9] KVM: arm/arm64: Don't cache the timer IRQ level

2017-12-13 Thread Marc Zyngier
On Wed, 13 Dec 2017 10:45:56 +, Christoffer Dall wrote: > > The timer was modeled after a strict idea of modelling an interrupt line > level in software, meaning that only transitions in the level needed to > be reported to the VGIC. This works well for the timer, because the > arch timer cod

[PATCH v8 3/9] KVM: arm/arm64: Don't cache the timer IRQ level

2017-12-13 Thread Christoffer Dall
The timer was modeled after a strict idea of modelling an interrupt line level in software, meaning that only transitions in the level needed to be reported to the VGIC. This works well for the timer, because the arch timer code is in complete control of the device and can track the transitions of