This patch adds id_reg_info for ID_AA64ISAR0_EL1 to make it writable
by userspace.
Updating sm3, sm4, sha1, sha2 and sha3 fields are allowed only
if values of those fields follow Arm ARM.
Signed-off-by: Reiji Watanabe <rei...@google.com>
---
arch/arm64/kvm/sys_regs.c | 31 +++++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 0e4423a81cb9..73b5dad0b2ee 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -328,6 +328,31 @@ static int validate_id_aa64pfr1_el1(struct kvm_vcpu *vcpu,
u64 val)
return 0;
}
+static int validate_id_aa64isar0_el1(struct kvm_vcpu *vcpu, u64 val)
+{
+ unsigned int sm3, sm4, sha1, sha2, sha3;
+
+ /* Run consistency checkings according to Arm ARM */
+ sm3 = cpuid_feature_extract_unsigned_field(val, ID_AA64ISAR0_SM3_SHIFT);
+ sm4 = cpuid_feature_extract_unsigned_field(val, ID_AA64ISAR0_SM4_SHIFT);
+ if (sm3 != sm4)
+ return -EINVAL;
+
+ sha1 = cpuid_feature_extract_unsigned_field(val,
+ ID_AA64ISAR0_SHA1_SHIFT);
+ sha2 = cpuid_feature_extract_unsigned_field(val,
+ ID_AA64ISAR0_SHA2_SHIFT);
+ if ((sha1 == 0) ^ (sha2 == 0))
+ return -EINVAL;
+
+ sha3 = cpuid_feature_extract_unsigned_field(val,
+ ID_AA64ISAR0_SHA3_SHIFT);
+ if (((sha2 == 2) ^ (sha3 == 1)) || (!sha1 && sha3))
+ return -EINVAL;
+
+ return 0;
+}
+
static void init_id_aa64pfr0_el1_info(struct id_reg_info *id_reg)
{
u64 limit;
@@ -396,6 +421,11 @@ static struct id_reg_info id_aa64pfr1_el1_info = {
.get_reset_val = get_reset_id_aa64pfr1_el1,
};
+static struct id_reg_info id_aa64isar0_el1_info = {
+ .sys_reg = SYS_ID_AA64ISAR0_EL1,
+ .validate = validate_id_aa64isar0_el1,
+};
+
/*
* An ID register that needs special handling to control the value for the
* guest must have its own id_reg_info in id_reg_info_table.
@@ -407,6 +437,7 @@ static struct id_reg_info id_aa64pfr1_el1_info = {
static struct id_reg_info *id_reg_info_table[KVM_ARM_ID_REG_MAX_NUM] = {
[IDREG_IDX(SYS_ID_AA64PFR0_EL1)] = &id_aa64pfr0_el1_info,
[IDREG_IDX(SYS_ID_AA64PFR1_EL1)] = &id_aa64pfr1_el1_info,
+ [IDREG_IDX(SYS_ID_AA64ISAR0_EL1)] = &id_aa64isar0_el1_info,
};
static int validate_id_reg(struct kvm_vcpu *vcpu,
--
2.33.0.882.g93a45727a2-goog
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