On Tue, Apr 12, 2016 at 02:59:04PM +0100, Andre Przywara wrote:
> Hi,
>
> On 30/03/16 21:40, Christoffer Dall wrote:
> > On Fri, Mar 25, 2016 at 02:04:33AM +, Andre Przywara wrote:
> >> From: Marc Zyngier
> >>
> >> As the GICv3 virtual interface registers differ from
Hi,
On 30/03/16 21:40, Christoffer Dall wrote:
> On Fri, Mar 25, 2016 at 02:04:33AM +, Andre Przywara wrote:
>> From: Marc Zyngier
>>
>> As the GICv3 virtual interface registers differ from their GICv2
>> siblings, we need different handlers for processing maintenance
On Fri, Mar 25, 2016 at 02:04:33AM +, Andre Przywara wrote:
> From: Marc Zyngier
>
> As the GICv3 virtual interface registers differ from their GICv2
> siblings, we need different handlers for processing maintenance
> interrupts and reading/writing to the LRs.
> Also as
From: Marc Zyngier
As the GICv3 virtual interface registers differ from their GICv2
siblings, we need different handlers for processing maintenance
interrupts and reading/writing to the LRs.
Also as we store an IRQ's affinity directly as a MPIDR, we need a
separate