Re: [PATCH v4 09/16] KVM: arm64: PMU: Do not let AArch32 change the counters' top 32 bits

2022-11-19 Thread Marc Zyngier
On 2022-11-18 07:45, Reiji Watanabe wrote: Hi Marc, On Sun, Nov 13, 2022 at 8:38 AM Marc Zyngier wrote: Even when using PMUv3p5 (which implies 64bit counters), there is no way for AArch32 to write to the top 32 bits of the counters. The only way to influence these bits (other than by

Re: [PATCH v4 09/16] KVM: arm64: PMU: Do not let AArch32 change the counters' top 32 bits

2022-11-17 Thread Reiji Watanabe
Hi Marc, On Sun, Nov 13, 2022 at 8:38 AM Marc Zyngier wrote: > > Even when using PMUv3p5 (which implies 64bit counters), there is > no way for AArch32 to write to the top 32 bits of the counters. > The only way to influence these bits (other than by counting > events) is by writing PMCR.P==1. >