It fixes a VEBOX GPU hang up issue while doing P010->NV12 CSC
v2: Add VPP_IECP_CSC_TRANSFORM flag for the actual transform (YUV<->RGB)
operation.
It removes the conflict meaning of proc_ctx->is_iecp_enabled and
proc_ctx->filters_mask when no actual transform is required, such as P010->NV12
Signe
Thanks for the patch, tested and applied.
> Signed-off-by: Pengfei Qu
> ---
> src/gen9_vme.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/src/gen9_vme.c b/src/gen9_vme.c
> index 8cbe052..245b0df 100644
> --- a/src/gen9_vme.c
> +++ b/src/gen9_vme.c
> @@ -1852,6 +1852,7 @@ stat
Hi Yann,
Are you using libva? what is v0.7.1 / v0.7.2?
Thanks
Haihao
> I have a decoding app which successfully decodes an h.264 stream on
> several platforms,
> both with i965 and amdgpu backends. If I add a simple rectangle
> overlay on one part of the
> stream, while it's working on some i96
Signed-off-by: Pengfei Qu
---
src/gen9_vme.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/src/gen9_vme.c b/src/gen9_vme.c
index 8cbe052..245b0df 100644
--- a/src/gen9_vme.c
+++ b/src/gen9_vme.c
@@ -1852,6 +1852,7 @@ static VAStatus
gen9_intel_hevc_input_check(VADriverContextP ctx,
I have a decoding app which successfully decodes an h.264 stream on
several platforms,
both with i965 and amdgpu backends. If I add a simple rectangle
overlay on one part of the
stream, while it's working on some i965 platforms, on the UP board we
can see a good number
of horizontal short black lin
> It fixes a VEBOX GPU hang up issue while doing P010->NV12 CSC
>
> Signed-off-by: peng.chen
> ---
> src/gen75_vpp_vebox.c | 16 +---
> 1 file changed, 9 insertions(+), 7 deletions(-)
> mode change 100644 => 100755 src/gen75_vpp_vebox.c
>
> diff --git a/src/gen75_vpp_vebox.c b/src