2015-10-28 17:00 GMT+01:00 Emil Velikov <emil.l.veli...@gmail.com>:
> Hi Gwenole,
>
> On 28 October 2015 at 15:46, Gwenole Beauchesne <gb.de...@gmail.com> wrote:
>> Statistics based on precise commits and actual contents (subsytems,
>> features, etc.). List
this message and all its attachments. Thank you.
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--
Gwenole Beauchesne
Intel Corporation SAS / 2 rue de Paris, 92196 Meudon Cedex
Allow creating VA surfaces with userptr allocated buffers. This requires
a recent enough version of libdrm (= 2.4.57), but also a kernel (= 3.16)
which contains appropriate fixes for userptr.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
configure.ac | 19
Shuffle the internal memory type ids by one, and turn them into clean
enum values. Also make sure to validate the VA surface memory type
early enough.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_drv_video.c | 5 +
src/i965_drv_video.h | 8 +---
2 files
Hi,
This patch series allows for importing userptr memory buffers into VA
surfaces. This requires a recent enough libdrm version (= 2.4.57) and
also kernel (= 3.16) with appropriate userptr fixes. The capabilities
are tentatively checked for at run-time.
Regards,
Gwenole Beauchesne (3):
extbuf
Fix possible buffer overflow when addressing the array of buffer handles
to be imported into VA surfaces.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_drv_video.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/i965_drv_video.c b/src
Shuffle the internal memory type ids by one, and turn them into clean
enum values. Also make sure to validate the VA surface memory type
early enough.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_drv_video.c | 5 +
src/i965_drv_video.h | 8 +---
2 files
Fix possible buffer overflow when addressing the array of buffer handles
to be imported into VA surfaces.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_drv_video.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/i965_drv_video.c b/src
Hi,
2015-03-24 5:40 GMT+01:00 Xiang, Haihao haihao.xi...@intel.com:
On Fri, 2015-03-20 at 16:09 +0100, Gwenole Beauchesne wrote:
Add support for low-power mode expressed with VA_PROC_PIPELINE_FAST
flag set to VAProcPipelineParameterBuffer.pipeline_flags. The purpose
is to discard any complex
format conversion, scaling and basic bob-deinterlacing.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_post_processing.c | 239 +
1 file changed, 239 insertions(+)
diff --git a/src/i965_post_processing.c b/src
This fixes support for Motion Adaptive deinterlacing mode on both
Sandybridge and Ivybridge platforms. In particular, correct field
ordering is now supported, and STMM ping-pong buffering is added.
v2: changed STMM surface format to Y800 for a single plane.
Signed-off-by: Gwenole Beauchesne
From: Xiang, Haihao haihao.xi...@intel.com
Signed-off-by: Xiang, Haihao haihao.xi...@intel.com
---
src/i965_post_processing.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c
index 2c01e43..72f298f 100755
---
The original current_out_surface was never released on exit. Main
reason for that is the legacy VPP framework that did not allow the
VADriverContextP handle to be passed down to the desired .finalize()
hook. Improved that to bring it on par with the VEBOX code path.
Signed-off-by: Gwenole
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_device_info.c | 1 +
src/i965_post_processing.c | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/i965_device_info.c b/src/i965_device_info.c
index 9227d0b..13e3daa 100644
--- a/src
This patch series brings the Sandybridge, Ivybridge and Baytrail code
path for advanced deinterlacing on par with what we now have for VEBOX
(Haswell and newer).
Gwenole Beauchesne (3):
vpp: fix memory leak in DNDI code path.
vpp: fix advanced deinterlacing on Sandybridge and Ivybridge.
vpp
patch to make
codec_info really per-codec. i.e. max resolution constraints can vary
on a per-codec basis, depending on the generation.
Regards,
--
Gwenole Beauchesne
Intel Corporation SAS / 2 rue de Paris, 92196 Meudon Cedex, France
Registration Number (RCS): Nanterre B 302 456 199
with filter_flags set accordingly.
Regards,
--
Gwenole Beauchesne
Intel Corporation SAS / 2 rue de Paris, 92196 Meudon Cedex, France
Registration Number (RCS): Nanterre B 302 456 199
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Velikov; Gwenole Beauchesne; libva@lists.freedesktop.org
Subject: RE: [Libva] mpeg4 decoding
On Mon, 2015-01-12 at 21:38 +, Varga, Michael wrote:
Haihao,
I use modulo_time_base when reconstructing the header VideoObjectPlane
header.
Does HW need the VOP header for decode ?
When
, you'd
stick to OGL, but I believe VA subpictures could suit your needs.
If there's sample code on how to do this, that would be very helpful.
mplayer-vaapi, gstreamer-vaapi for VA subpictures composition.
https://gitorious.org/vaapi/mplayer (hwaccel-vaapi branch).
Regards,
--
Gwenole
would also need the actual
vop_time_increment bits, right?
Thanks,
--
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Intel Corporation SAS / 2 rue de Paris, 92196 Meudon Cedex, France
Registration Number (RCS): Nanterre B 302 456 199
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Make sure the newly calculated filter coefficients fall into the HW
accepted range of values. This normally should not be an issue with
the current configuration / scaling algorithms though.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen8_post_processing.c | 15
-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/Makefile.am| 2 +
src/gen8_post_processing.c | 101 +
src/i965_post_processing.c | 218 ++---
src/i965_vpp_avs.c | 110 +++
src
), and to the legacy platforms
down to Ironlake (ilk).
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_post_processing.c | 21 +++--
src/i965_structs.h | 25 ++---
2 files changed, 33 insertions(+), 13 deletions(-)
diff --git
Honour advanced video scaling. i.e. propagate vaPutSurface() scaling
flags, but also VPP filter flags. Also enable the sharp 8x8 filter for
high-quality scaling options, while adaptive video scaling is disabled
(bypassed) for now.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
Fix AVS filter coefficients for Broadwell. At least, we now address
the expected entry in the table but the actual value is still not
viable enough.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen8_post_processing.c | 83
was
never set. Dropped the associated dead code, which was never used. And,
anyway, advanced deinterlacing modes shall go through the explcit VPP
interfaces.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen75_vpp_vebox.c | 6 +++---
src/gen8_render.c | 6
If scaling parameters don't change, i.e. if the same scaling algorithm
and factors are used, there is no point in calculating the filter
coefficients again. So, just cache them into the existing AVS context.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_device_info.c | 1 +
src/i965_post_processing.c | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/i965_device_info.c b/src/i965_device_info.c
index a415587..8d9db88 100644
--- a/src
Hi,
This patch series brings the Sandybridge, Ivybridge and Baytrail code
path for advanced deinterlacing on par with what we now have for VEBOX
(Haswell and newer).
Another patch series would come next to handle one extra future
reference frame.
Regards,
Gwenole Beauchesne (3):
vpp: fix
This fixes support for Motion Adaptive deinterlacing mode on both
Sandybridge and Ivybridge platforms. In particular, correct field
ordering is now supported, and STMM ping-pong buffering is added.
v2: changed STMM surface format to Y800 for a single plane.
Signed-off-by: Gwenole Beauchesne
-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/Makefile.am| 2 +
src/gen8_post_processing.c | 101 +
src/i965_post_processing.c | 218 ++---
src/i965_vpp_avs.c | 109 +++
src/i965_vpp_avs.h
2014-10-13 19:27 GMT+02:00 Gwenole Beauchesne gb.de...@gmail.com:
Add support for high-quality scaling during video processing. This is
enabled with the VA_FILTER_SCALING_HQ filter flag. The algorithm used
for that is based on a Lanczos convolution kernel: 3 lobes on either
side for luma
2014-10-13 19:27 GMT+02:00 Gwenole Beauchesne gb.de...@gmail.com:
If scaling parameters don't change, i.e. if the same scaling algorithm
and factors are used, there is no point in calculating the filter
coefficients again. So, just cache them into the existing AVS context.
Signed-off
Fix AVS filter coefficients for Broadwell. At least, we now address
the expected entry in the table but the actual value is still not
viable enough.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen8_post_processing.c | 83
-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_post_processing.c | 21 +++--
src/i965_structs.h | 25 ++---
2 files changed, 33 insertions(+), 13 deletions(-)
diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c
index
was
never set. Dropped the associated dead code, which was never used. And,
anyway, advanced deinterlacing modes shall go through the explcit VPP
interfaces.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen75_vpp_vebox.c | 10 +-
src/gen8_render.c
Make sure the newly calculated filter coefficients fall into the HW
accepted range of values. This normally should not be an issue with
the current configuration / scaling algorithms though.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen8_post_processing.c | 15
but
confident enough experiment. More testing is needed, especially on
other platforms. Fully adaptive mode is not programmed yet.
Patched sources available for convenience here:
https://github.com/gbeauchesne/libva-intel-driver/tree/18.vpp.avs
Regards,
Gwenole Beauchesne (8):
vpp: fix adaptive filter
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--
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Intel Corporation SAS / 2 rue de Paris, 92196 Meudon Cedex, France
Registration Number (RCS): Nanterre B 302 456 199
://lists.freedesktop.org/mailman/listinfo/libva
--
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Intel Corporation SAS / 2 rue de Paris, 92196 Meudon Cedex, France
Registration Number (RCS): Nanterre B 302 456 199
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Poulsbo), and subsequently adopted by the major
multimedia frameworks.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
va/va.h | 14 ++
va/va_dec_jpeg.h | 2 ++
2 files changed, 16 insertions(+)
diff --git a/va/va.h b/va/va.h
index 127ad49..01694a9 100644
2014-09-25 8:27 GMT+02:00 Zhao, Yakui yakui.z...@intel.com:
On Wed, 2014-09-24 at 23:35 -0600, Gwenole Beauchesne wrote:
Hi,
2014-09-25 3:00 GMT+02:00 Zhao, Yakui yakui.z...@intel.com:
On Wed, 2014-09-24 at 03:10 -0600, Gwenole Beauchesne wrote:
Hi,
Great to see that finally fixed
risk to
get that on time for 1.4.0 release. OK?
On Wed, Sep 24, 2014 at 1:40 AM, Gwenole Beauchesne gb.de...@gmail.com
wrote:
Hi,
This patch series adds support for DRM Render-Nodes through the
existing vaGetDisplayDRM() interface.
Practical use-case: this allows for remote users, connected
display opened (user logged in).
Signed-off-by: Andrey Larionov andrey.lario...@intel.com
[checked if fd is a render-node, fixed VA_DISPLAY_DRM_RENDERNODES]
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
va/drm/va_drm.c | 28 +---
va/drm/va_drm_utils.c
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
test/common/va_display_drm.c | 26 +-
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/test/common/va_display_drm.c b/test/common/va_display_drm.c
index aa9f60a..d427984 100644
--- a/test
for DRM Render-Node
devices to be supported, which is an important enough improvement.
Tested with gstreamer-vaapi and another proprietary software. This
should be landed to the libva 1.4.0 relese too.
Andrey Larionov (1):
drm: add support for render nodes.
Gwenole Beauchesne (1):
tests: try
character is stripped.
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Intel Corporation SAS / 2 rue de Paris, 92196 Meudon Cedex, France
Registration
2014-09-24 10:40 GMT+02:00 Gwenole Beauchesne gb.de...@gmail.com:
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
test/common/va_display_drm.c | 26 +-
1 file changed, 21 insertions(+), 5 deletions(-)
diff --git a/test/common/va_display_drm.c b
Hi,
2014-09-25 3:00 GMT+02:00 Zhao, Yakui yakui.z...@intel.com:
On Wed, 2014-09-24 at 03:10 -0600, Gwenole Beauchesne wrote:
Hi,
Great to see that finally fixed.
2014-09-24 9:13 GMT+02:00 Zhao Yakui yakui.z...@intel.com:
On some systems there is no access to /proc/cpuinfo. So the inline
@@ stamp-h1
/test/egl/va_egl
/test/encode/avcenc
/test/encode/h264encode
+/test/encode/mpeg2vaenc
/test/putsurface/putsurface
/test/putsurface/putsurface_wayland
/test/transcode/mpeg2transcode
OK for all branches.
Thanks,
--
Gwenole Beauchesne
Intel Corporation SAS / 2 rue de Paris
-config check failed somehow. (i) cannot occur because you
cannot even build the current VA intel-driver git master branch
against libva 1.3 I'd guess. So you are left with (ii) and another fix
might be needed then. i.e. why did the pkg-config check command
failed?
Regards,
--
Gwenole Beauchesne
Pushed to git master and staging branches.
This needs to go to 1.4-branch too.
Thanks,
Gwenole
2014-09-08 19:10 GMT+02:00 Gwenole Beauchesne gb.de...@gmail.com:
Allow for vaQuerySurfaceAttributes() to return BGRA and BGRX formats
for VPP on Ivybridge and Haswell. This is supported as both
Pushed to git master and staging branches.
This needs to go to 1.4-branch too.
2014-09-09 15:21 GMT+02:00 Gwenole Beauchesne gb.de...@gmail.com:
If the intel-gen4asm tool is not available, ship with the pre-built
EU kernels instead of trying to regenerate them. In particular, just
don't
.
This is *not* strictly needed for 1.4-branch since we no longer print
the git version string in release builds.
Regards,
Gwenole.
2014-09-02 10:13 GMT+02:00 Gwenole Beauchesne gb.de...@gmail.com:
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
configure.ac |5
Hi,
2014-09-09 7:27 GMT+02:00 Antti Seppälä a.sepp...@gmail.com:
On 9 September 2014 06:36, Gwenole Beauchesne gb.de...@gmail.com wrote:
Hi,
2014-09-08 15:18 GMT+02:00 Antti Seppälä a.sepp...@gmail.com:
On 27 August 2014 14:50, Gwenole Beauchesne gb.de...@gmail.com wrote:
Hi,
This patch
Allow for vaQuerySurfaceAttributes() to return BGRA and BGRX formats
for VPP on Ivybridge and Haswell. This is supported as both source
and target surface formats.
This fixes VA/EGL interop on Gen7 processors when a BGR[AX] surface
is exported into an EGLImage.
Signed-off-by: Gwenole Beauchesne
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
configure.ac |5 +
src/Makefile.am | 39 +--
src/i965_drv_version.h.in | 36
src/i965_drv_video.c |7 +++
4
Move out generation of the vendor string to its specific helper function,
while also making it more robust and aware of possible overflows.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_drv_video.c | 47 +++
1 file
Hi,
2014-08-29 2:44 GMT+02:00 Zhao, Yakui yakui.z...@intel.com:
On Thu, 2014-08-28 at 02:35 -0600, Gwenole Beauchesne wrote:
Hi Yakui,
2014-08-28 3:16 GMT+02:00 Zhao, Yakui yakui.z...@intel.com:
On Wed, 2014-08-27 at 05:50 -0600, Gwenole Beauchesne wrote:
Silence the following compilation
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--
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Intel Corporation SAS / 2 rue de Paris, 92196 Meudon Cedex, France
Registration Number (RCS): Nanterre B 302 456 199
Hi Yakui,
2014-08-28 3:16 GMT+02:00 Zhao, Yakui yakui.z...@intel.com:
On Wed, 2014-08-27 at 05:50 -0600, Gwenole Beauchesne wrote:
Silence the following compilation warning:
CC i965_drv_video_la-gen75_vpp_vebox.lo
gen75_vpp_vebox.c: In function 'bdw_veb_dndi_iecp_command
Use the existing VPP_{DNDI,IECP}_xxx flags instead of magic numbers.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen75_vpp_vebox.c | 16
src/gen75_vpp_vebox.h |2 ++
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/src
of the VEB_DI_IECP::endingX variable
with existing helper macros.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen75_vpp_vebox.c | 16 ++--
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/src/gen75_vpp_vebox.c b/src/gen75_vpp_vebox.c
index 1113c90
, is VA_DEINTERLACING_BOTTOM_FIELD_FIRST.
https://bugs.freedesktop.org/show_bug.cgi?id=72518
https://bugs.freedesktop.org/show_bug.cgi?id=72522
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen75_vpp_vebox.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
applies to the staging branch. Applying to master
is straightforward too. A convenience repository for the latter is
available here:
https://github.com/gbeauchesne/libva-intel-driver/tree/17.vpp.vebox
Regards,
Gwenole Beauchesne (13):
vebox: silence compilation warning.
vebox: drop magic numbers
The arguments to vpp_surface_convert() were mixed up. i.e. both input
and output surfaces were reversed. Changed the vpp_surface_scaling()
arguments order as well to have more consistent helper functions.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen75_vpp_vebox.c
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen75_vpp_vebox.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/src/gen75_vpp_vebox.c b/src/gen75_vpp_vebox.c
index 9d400d9..f2d64ac 100644
--- a/src/gen75_vpp_vebox.c
+++ b/src
detection
code, thus allowing more multiple VEBOX calls with an additional format
conversion away.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen75_vpp_vebox.c | 380 -
src/gen75_vpp_vebox.h | 13 +-
2 files changed
If IECP is enabled, for instance when color conversion is performed
or ProcAmp adjustments are applied, the ultimate denoised output with
additional processing operations applied is the Current Output frame,
not the plain Current Denoised Output frame.
Signed-off-by: Gwenole Beauchesne
Rename FRAME_STORE_SUM to FRAME_STORE_COUNT, use existing macros to
determine the number of elements in the frame store array, avoid
duplicate zero initializations.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen75_vpp_vebox.c | 10 +++---
src/gen75_vpp_vebox.h
Clean-up frame store surface storage allocation, rename the helper
function to gen75_vebox_ensure_surfaces_storage() and make it more
robust to allocation errors. i.e. propagate them up right away.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen75_vpp_vebox.c | 206
Hi,
2014-08-26 7:34 GMT+02:00 Xiang, Haihao haihao.xi...@intel.com:
On Mon, 2014-08-25 at 11:44 +0200, Gwenole Beauchesne wrote:
Hi,
2014-08-22 10:48 GMT+02:00 Xiang, Haihao haihao.xi...@intel.com:
Implement va{Acquire,Release}BufferHandle() hooks so that to allow
VA surface or VA image
Hi,
This patch series enforces busy surface states for practical
use-cases. In particular, this prevents VA surfaces to be used while
they are being exposed to 3rdparty APIs (exported):
http://lists.freedesktop.org/archives/libva/2014-August/002585.html
Regards,
Gwenole Beauchesne (2):
Factor
-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_drv_video.c | 48
src/i965_drv_video.h |1 +
2 files changed, 49 insertions(+)
diff --git a/src/i965_drv_video.c b/src/i965_drv_video.c
index e45cfb3..a628e05 100755
--- a/src
.
Thanks,
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Intel Corporation SAS / 2 rue de Paris, 92196 Meudon Cedex, France
Registration Number (RCS): Nanterre B 302 456 199
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to validate the filter chain somehow.
Besides, I believe we should probably return
VA_STATUS_ERROR_INVALID_IMAGE_FORMAT or any other
VA_STATUS_ERROR_INVALID_SURFACE_FORMAT that yields the same error
code?
Thanks,
--
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Intel Corporation SAS / 2 rue de Paris, 92196 Meudon Cedex, France
to be in sync then?
v2: made sure to sync bo before export, improved VA buffer type check.
v3: tracked internal resources on acquire, disposed them on release.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_drv_video.c | 129
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Intel Corporation SAS / 2 rue de Paris, 92196 Meudon Cedex, France
Registration
2014-08-14 13:59 GMT+02:00 Gwenole Beauchesne gb.de...@gmail.com:
Some bitstreams (e.g. truncated, or non conformant), or bugs in codec
layers, would incorrectly make decoders to fill in the RefPicList0/1
lists with surfaces that have not received any content yet.
There is no reason
/show_bug.cgi?id=82466
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_decoder_utils.c |4
1 file changed, 4 insertions(+)
diff --git a/src/i965_decoder_utils.c b/src/i965_decoder_utils.c
index 546285e..7ea39dd 100644
--- a/src/i965_decoder_utils.c
+++ b/src
Hi,
2014-08-13 18:45 GMT+02:00 Gwenole Beauchesne gb.de...@gmail.com:
Implement va{Acquire,Release}BufferHandle() hooks so that to allow
VA surface or VA image buffer sharing with thirdparty APIs like EGL,
OpenCL, etc.
v2: made sure to sync bo before export, improved VA buffer type check
-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_drv_video.c | 129 ++
src/i965_drv_video.h |4 ++
2 files changed, 133 insertions(+)
diff --git a/src/i965_drv_video.c b/src/i965_drv_video.c
index 32a7c72..92cbf9a 100755
performance when downloading from Uncacheable Speculative Write
Combining (USWC) memory.
The best example for that is VLC:
http://git.videolan.org/?p=vlc.git;a=summary (look for copy.[ch]
files, vaapi.[ch] files).
Regards,
--
Gwenole Beauchesne
Intel Corporation SAS / 2 rue de Paris, 92196 Meudon
Hi,
2014-07-24 19:45 GMT+02:00 Steven Toth st...@kernellabs.com:
I'd like my application to allocate buffers (not DRM_PRIME or
KERNEL_PRIME) and use each of these for a surface, passing the
allocation by reference during CreateSurface. I've seen various
examples (below) of projects that
Hi,
2014-06-24 13:27 GMT+02:00 Jean-Yves Avenard jyaven...@gmail.com:
Hi.
Following earlier discussion, I've replaced our use of
vaCopySurfaceGLC with a call to vaPutSurface.
This is the resulting change:
https://github.com/MythTV/mythtv/commit/9ef798e543e63785d898eb23e77ca1a2a7d08c4b
I
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--
Gwenole Beauchesne
are the long-term
supported approach.
Regards,
--
Gwenole Beauchesne
Intel Corporation SAS / 2 rue de Paris, 92196 Meudon Cedex, France
Registration Number (RCS): Nanterre B 302 456 199
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Intel Corporation SAS / 2
Pushed to the git master branch.
2014-06-03 18:20 GMT+02:00 Gwenole Beauchesne gb.de...@gmail.com:
Hi,
This patch series merges in the H.264 MVC profiles from the staging
branch. I combined all necessary patches into a single one since there
was not really clear MVC patches identified
Pushed to the git staging branch.
2014-03-10 18:47 GMT+01:00 Gwenole Beauchesne gb.de...@gmail.com:
Add interfaces for low-level buffer exports to suport interop with
external APIs like EGL or OpenCL (OCL). Theory of operations:
- vaAcquireBufferHandle(): locks buffer for external API usage
,
--
Gwenole Beauchesne
Intel Corporation SAS / 2 rue de Paris, 92196 Meudon Cedex, France
Registration Number (RCS): Nanterre B 302 456 199
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Implement va{Acquire,Release}BufferHandle() hooks so that to allow
VA surface or VA image buffer sharing with thirdparty APIs like EGL,
OpenCL, etc.
v2: made sure to sync bo before export, improved VA buffer type check.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src
FYI, I will push this by the end of this week along with the
associated demo code.
2014-06-16 18:18 GMT+02:00 Gwenole Beauchesne gb.de...@gmail.com:
Implement va{Acquire,Release}BufferHandle() hooks so that to allow
VA surface or VA image buffer sharing with thirdparty APIs like EGL,
OpenCL
Hi,
2014-06-10 20:33 GMT+02:00 Sam Jansen sam.jan...@starleaf.com:
I've been working on H264 encode, decode, and JPEG decode VA-API programs
recently, using the Intel va-driver on Sandy Bridge and Bay Trail.
This has gone well, but I've hit a problem with the H264 decoder in some
situations
. it is the same
for
all reference frames that intervened in the decoding process of all inter
view
components of the previous access unit. The age tracks access units.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/gen6_mfd.c |4 +-
src/gen6_mfd.h
2014-06-06 9:59 GMT+02:00 Gwenole Beauchesne gb.de...@gmail.com:
Hi,
2014-06-06 8:27 GMT+02:00 Zhao, Yakui yakui.z...@intel.com:
On Thu, 2014-06-05 at 17:46 -0600, Gwenole Beauchesne wrote:
In strict MVC decoding mode, when only the necessary set of inter-view
reference pictures are passed
2014-06-06 10:55 GMT+02:00 Zhao, Yakui yakui.z...@intel.com:
On Fri, 2014-06-06 at 02:02 -0600, Gwenole Beauchesne wrote:
2014-06-06 9:59 GMT+02:00 Gwenole Beauchesne gb.de...@gmail.com:
Hi,
2014-06-06 8:27 GMT+02:00 Zhao, Yakui yakui.z...@intel.com:
On Thu, 2014-06-05 at 17:46 -0600
2014-06-05 11:07 GMT+02:00 Sreerenj sreerenj.balachand...@intel.com:
On 05.06.2014 12:05, Gwenole Beauchesne wrote:
2014-06-05 11:00 GMT+02:00 sreerenj.balachand...@intel.com:
From: Sreerenj Balachandran sreerenj.balachand...@intel.com
---
src/i965_drv_video.c | 1 +
1 file changed
2014-06-05 17:29 GMT+02:00 Xiang, Haihao haihao.xi...@intel.com:
-Original Message-
From: Gwenole Beauchesne [mailto:gb.de...@gmail.com]
Sent: Thursday, June 05, 2014 9:29 PM
To: Xiang, Haihao
Cc: Zhao, Yakui; libva@lists.freedesktop.org
Subject: Re: [Libva] [PATCH v3 intel-driver
rendering to Pixmap
for EXT_texture_from_pixmap and more precisely interlaced streams.
Signed-off-by: Gwenole Beauchesne gwenole.beauche...@intel.com
---
src/i965_output_dri.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/src/i965_output_dri.c b/src/i965_output_dri.c
index fdd69ce..8102e83
1 - 100 of 360 matches
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