Re: [libvirt] [PATCH v4 2/2] PPC64 support for NVIDIA V100 GPU with NVLink2 passthrough

2019-04-02 Thread Daniel Henrique Barboza
On 4/2/19 4:37 AM, Peter Krempa wrote: On Tue, Mar 12, 2019 at 18:55:50 -0300, Daniel Henrique Barboza wrote: The NVIDIA V100 GPU has an onboard RAM that is mapped into the host memory and accessible as normal RAM via an NVLink2 bridge. When passed through in a guest, QEMU puts the NVIDIA

Re: [libvirt] [PATCH v4 2/2] PPC64 support for NVIDIA V100 GPU with NVLink2 passthrough

2019-04-02 Thread Peter Krempa
On Tue, Mar 12, 2019 at 18:55:50 -0300, Daniel Henrique Barboza wrote: > The NVIDIA V100 GPU has an onboard RAM that is mapped into the > host memory and accessible as normal RAM via an NVLink2 bridge. When > passed through in a guest, QEMU puts the NVIDIA RAM window in a > non-contiguous area,

[libvirt] [PATCH v4 2/2] PPC64 support for NVIDIA V100 GPU with NVLink2 passthrough

2019-03-12 Thread Daniel Henrique Barboza
The NVIDIA V100 GPU has an onboard RAM that is mapped into the host memory and accessible as normal RAM via an NVLink2 bridge. When passed through in a guest, QEMU puts the NVIDIA RAM window in a non-contiguous area, above the PCI MMIO area that starts at 32TiB. This means that the NVIDIA RAM