Dear Chander Kashyap,
In message 1324275424-29468-3-git-send-email-chander.kash...@linaro.org you
wrote:
Earliar ARM clock frequency was calculated by:
MOUTAPLL/(DIVAPLL + 1) which is actually returning SCLKAPLL.
It is fixed by calcuating it as follows:
Um Comment and code disagree:
Dear Wolfgang Denk,
On 19 December 2011 13:27, Wolfgang Denk w...@denx.de wrote:
Dear Chander Kashyap,
In message 1324275424-29468-3-git-send-email-chander.kash...@linaro.org
you wrote:
Earliar ARM clock frequency was calculated by:
MOUTAPLL/(DIVAPLL + 1) which is actually returning
On 19 December 2011 16:57, Wolfgang Denk w...@denx.de wrote:
Dear Chander Kashyap,
In message 1324275424-29468-3-git-send-email-chander.kash...@linaro.org you
wrote:
Earliar ARM clock frequency was calculated by:
MOUTAPLL/(DIVAPLL + 1) which is actually returning SCLKAPLL.
It is fixed by
Dear Wolfgang Denk,
On 19 December 2011 13:50, Chander Kashyap chander.kash...@linaro.orgwrote:
Dear Wolfgang Denk,
On 19 December 2011 13:27, Wolfgang Denk w...@denx.de wrote:
Dear Chander Kashyap,
In message 1324275424-29468-3-git-send-email-chander.kash...@linaro.org
you wrote:
On 19 December 2011 13:56, Minkyu Kang proms...@gmail.com wrote:
On 19 December 2011 16:57, Wolfgang Denk w...@denx.de wrote:
Dear Chander Kashyap,
In message 1324275424-29468-3-git-send-email-chander.kash...@linaro.org
you wrote:
Earliar ARM clock frequency was calculated by:
Chander Kashyap (2):
Exynos: PWM: Add TCMPB3 field in pwm structure
Exynos: Fix ARM Clock frequency calculation
arch/arm/cpu/armv7/exynos/clock.c | 15 +--
arch/arm/include/asm/arch-exynos/pwm.h |2 +-
2 files changed, 10 insertions(+), 7 deletions(-)
--
1.7.5.4
Add TCMPB3 field in pwm structure, earliar this was res1.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/pwm.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/arm/include/asm/arch-exynos/pwm.h
Earliar ARM clock frequency was calculated by:
MOUTAPLL/(DIVAPLL + 1) which is actually returning SCLKAPLL.
It is fixed by calculating it as follows:
ARMCLK=MOUTCORE / (DIVCORE + 1) / (DIVCORE2 + 1)
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
Changes for V2:
- Fixed
CC'ing Snowball User mailing list.
On 16/12/11 10:51, Amit Kucheria wrote:
Great! Thanks David. I've linked to it and Vincent's page from here:
https://wiki.linaro.org/WorkingGroups/PowerManagement/Doc/BoardHackingforPower
On Fri, Dec 16, 2011 at 2:39 AM, David Anders x0132...@ti.com
Dear Chander Kashyap,
In message canuqghhq_+az6z100agouaumeuyxwh-hl6anpgrtowbadeq...@mail.gmail.com
you wrote:
In message 1324275424-29468-3-git-send-email-chander.kash...@linaro.org
you wrote:
Earliar ARM clock frequency was calculated by:
MOUTAPLL/(DIVAPLL + 1) which is actually
Dear Chander Kashyap,
In message 1324285004-32354-2-git-send-email-chander.kash...@linaro.org you
wrote:
Add TCMPB3 field in pwm structure, earliar this was res1.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
---
arch/arm/include/asm/arch-exynos/pwm.h |2 +-
1 files
Dear Wolfgang Denk,
On 19 December 2011 14:29, Wolfgang Denk w...@denx.de wrote:
Dear Chander Kashyap,
In message
canuqghhq_+az6z100agouaumeuyxwh-hl6anpgrtowbadeq...@mail.gmail.com you
wrote:
In message
1324275424-29468-3-git-send-email-chander.kash...@linaro.org
you wrote:
Hi Wolfgsng Denk,
On 19 December 2011 14:33, Wolfgang Denk w...@denx.de wrote:
Dear Chander Kashyap,
In message 1324285004-32354-2-git-send-email-chander.kash...@linaro.org
you wrote:
Add TCMPB3 field in pwm structure, earliar this was res1.
Signed-off-by: Chander Kashyap
On Mon, Dec 19, 2011 at 10:05:12AM +, Jamie Iles wrote:
Hi Richard,
On Mon, Dec 19, 2011 at 11:21:40AM +0800, Richard Zhao wrote:
It support single core and multi-core ARM SoCs. But currently it assume
all cores share the same frequency and voltage.
Signed-off-by: Richard Zhao
On 12/19/2011 08:39 AM, Jamie Iles wrote:
On Mon, Dec 19, 2011 at 10:19:29PM +0800, Richard Zhao wrote:
On Mon, Dec 19, 2011 at 10:05:12AM +, Jamie Iles wrote:
Hi Richard,
On Mon, Dec 19, 2011 at 11:21:40AM +0800, Richard Zhao wrote:
It support single core and multi-core ARM SoCs. But
I think bero's workaround that Michael Hope suggested, pass
-mno-unaligned-access to the kernel via KFLAGS may fix this. The
change we made on Android was:
http://review.android.git.linaro.org/#patch,sidebyside,1285,1,tasks/kernel.mk
On 7 December 2011 23:05, john stultz johns...@us.ibm.com
On Mon, 19 Dec 2011, peter green wrote:
On the issue of the R? definitions I proposed renaming them
to REG_R?. The use of a REG_ prefix is consistent with
x86, x64 and sparc (I couldn't find any comparable definitions
at all on other architectures I looked at) I asked what the
impact of this
On 1 December 2011 13:01, Christian Robottom Reis k...@linaro.org wrote:
I did a presentation this November at LinuxCon Brazil called The
Wierd World of Linux on ARM (featuring Android):
https://events.linuxfoundation.org/events/linuxcon-brasil/programacao
I thought the slides might be
On 12/18/11 17:03, Richard Zhao wrote:
Do you have to patch to implement per-cpu udelay? In current code, udelay uses
global loops_per_jiffy.
We've been carrying forward the timer based udelay patches. They're in
the patch tracker as 6873/1, 6874/1, and 6875/1.
--
Sent by an employee of
Hi Mark,
On Tue, Dec 13, 2011 at 02:33:45PM +0800, Mark Brown wrote:
On Mon, Dec 12, 2011 at 08:06:56PM +0530, Ashish Jangam wrote:
The DA9052/53 is a highly integrated PMIC subsystem with supply domain
flexibility to support wide range of high performance application.
It provides
On Mon, Dec 19, 2011 at 10:19:29PM +0800, Richard Zhao wrote:
On Mon, Dec 19, 2011 at 10:05:12AM +, Jamie Iles wrote:
Hi Richard,
On Mon, Dec 19, 2011 at 11:21:40AM +0800, Richard Zhao wrote:
It support single core and multi-core ARM SoCs. But currently it assume
all cores share
Hi Richard,
On Mon, Dec 19, 2011 at 11:21:40AM +0800, Richard Zhao wrote:
It support single core and multi-core ARM SoCs. But currently it assume
all cores share the same frequency and voltage.
Signed-off-by: Richard Zhao richard.z...@linaro.org
---
On arm linux sys/ucontext.h heavilly polloutes the global
namespace firstly by including sys/user.h (which defines
among other things a type called struct user and secondly
by defining symbols and #defines named R? to represent
the processor registers.
That issue in itself is nothing new but
Hi,
I am trying to modify the ACTLR register. But it is not possible because Linux
kernel is booting in non-secure mode. For the same reason I cannot fix some
errata by writing to the diagnostic register. I am using Snowball board. A very
simple question I have: Is it possible to call secure
On Tue, Dec 13, 2011 at 03:49:33PM +0530, Rajendra Nayak wrote:
I'm OK with this but would prefer that OMAP or TWL people were OK with
it too. If you do need to respin:
+For twl4030 regulators/LDO's
' should *not* be used for plurals except when omitting a duplicated s
introduced by one
Hi -
I recently brought in v 15 (and then v 17) of the CMA patches on
tilt-tracking and backported to tilt-3.1 in order to support Panda
onboard camera.
Without any highmem, stuff is working great, but with HIGHMEM, inclusion
of either v15 and v17 CMA consistently blows chunks during DMA
On Mon, Dec 19, 2011 at 09:00:44AM -0600, Rob Herring wrote:
On 12/19/2011 08:39 AM, Jamie Iles wrote:
On Mon, Dec 19, 2011 at 10:19:29PM +0800, Richard Zhao wrote:
On Mon, Dec 19, 2011 at 10:05:12AM +, Jamie Iles wrote:
Hi Richard,
On Mon, Dec 19, 2011 at 11:21:40AM +0800, Richard
Hello Andy,
On Tuesday, December 20, 2011 2:56 AM You wrote:
I recently brought in v 15 (and then v 17) of the CMA patches on
tilt-tracking and backported to tilt-3.1 in order to support Panda
onboard camera.
Without any highmem, stuff is working great, but with HIGHMEM, inclusion
of
On 12/20/2011 03:38 PM, Somebody in the thread at some point said:
Hi -
Is it expected CMA and high memory should work OK? I see there's a note
in the CMA log about implement support for contiguous memory areas
placed in HIGHMEM zone, but it's ambiguous if it should be ignoring
highmem or is
29 matches
Mail list logo
