From: "Ying-Chun Liu (PaulLiu)"
Anatop is an integrated regulator inside i.MX6 SoC.
There are 3 digital regulators which controls PU, CORE (ARM), and SOC.
And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB).
This patch adds the Anatop regulator driver.
Signed-off-by: Nancy Chen
Signed-of
On Fri, 24 Feb 2012 10:49:00 -0800, Tony Lindgren wrote:
> * Rajendra Nayak [120223 19:29]:
> > On Friday 24 February 2012 12:27 AM, Tony Lindgren wrote:
> > >>--- a/arch/arm/boot/dts/omap3.dtsi
> > >>+++ b/arch/arm/boot/dts/omap3.dtsi
> > >>@@ -113,5 +113,31 @@
> > >> #s
On Thu, 23 Feb 2012 17:31:27 +0530, Rajendra Nayak wrote:
> Define dt bindings for the ti-omap-hsmmc, and adapt
> the driver to extract data (which was earlier passed as
> platform_data) from device tree.
>
> Signed-off-by: Rajendra Nayak
> ---
> .../devicetree/bindings/mmc/ti-omap-hsmmc.txt
Hi,
On Thu, Mar 08 2012, Rajendra Nayak wrote:
> There's just one other cleanup patch here [1] to convert all pr_* prints
> in the driver to dev_*. Would be great if you can pick that as well.
>
> Thanks,
> Rajendra
>
> [1] http://marc.info/?l=linux-mmc&m=132999677405098&w=3
Thanks, I've pushed t
Hello Mike,
The main interface for clk implementer is to register clocks dynamically.
I think it highly depends on clk DT bindings. From the patch Grant sent
out, it looks like he doesn't like one node per clk. So how do we
register clocks dynamically? You have any sample code?
Thanks
Richard
_
On Thu, Mar 08, 2012 at 07:27:39AM +0100, Andrew Lunn wrote:
> > Assuming that some day OMAP code can be refactored to allow for lazy
> > (or at least initcall-based) registration of clocks then perhaps your
> > suggestion can take root. Which leads me to this question: are there
> > any other pla
On Thu, Mar 8, 2012 at 6:50 PM, Pantelis Antoniou
wrote:
>
> Hi there,
>
> There's considerable activity in the subject of the scheduler lately and how
> to
> adapt it to the peculiarities of the new class of hardware coming out lately,
> like the big.LITTLE class of devices from a number of manu
Hi Yadi,
On Mar 8, 2012, at 7:40 PM, Yadwinder Singh Brar wrote:
> On Thu, Mar 8, 2012 at 6:50 PM, Pantelis Antoniou
> wrote:
>>
>> Hi there,
>>
>> There's considerable activity in the subject of the scheduler lately and how
>> to
>> adapt it to the peculiarities of the new class of hardware
On 08/03/12 17:21, Nicolas Pitre wrote:
> On Thu, 8 Mar 2012, Richard Earnshaw wrote:
>
>> On 02/03/12 21:15, Nicolas Pitre wrote:
>>> So, to me, the gcc documentation is perfectly clear on this topic.
>>> there really _is_ a guarantee that those asm marked variables will be in
>>> the expected reg
On Thu, 8 Mar 2012, Richard Earnshaw wrote:
> On 02/03/12 21:15, Nicolas Pitre wrote:
> > So, to me, the gcc documentation is perfectly clear on this topic.
> > there really _is_ a guarantee that those asm marked variables will be in
> > the expected registers on entry to the inline asm, given tha
On Thu, Mar 08, 2012 at 03:20:53PM +0200, Pantelis Antoniou wrote:
> Hi there,
>
> There's considerable activity in the subject of the scheduler lately and how
> to
> adapt it to the peculiarities of the new class of hardware coming out lately,
> like the big.LITTLE class of devices from a numbe
Hi Frederic,
On Mar 8, 2012, at 5:45 PM, Frederic Weisbecker wrote:
> On Thu, Mar 08, 2012 at 03:20:53PM +0200, Pantelis Antoniou wrote:
>> Hi there,
>>
[snip]
>
> Hi,
>
> May be you could have a look at the perf sched tool.
> It has a replay feature. I think it perform well basic replay but
On 03/07/2012 09:46 PM, Rajendra Nayak wrote:
> Hi Rob/Grant,
>
> On Thursday 23 February 2012 05:31 PM, Rajendra Nayak wrote:
>> Define dt bindings for the ti-omap-hsmmc, and adapt
>> the driver to extract data (which was earlier passed as
>> platform_data) from device tree.
>
> Any comments on
Hi All,
There's a scheduled downtime for 30 min, tomorrow at 15:00UTC.
We plan to increase the disk space available on people.linaro.org.
Thanks.
Cheers,
--
Fathi
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On 17:59 Thu 08 Mar , Ying-Chun Liu (PaulLiu) wrote:
> From: "Ying-Chun Liu (PaulLiu)"
>
> Anatop is an integrated regulator inside i.MX6 SoC.
> There are 3 digital regulators which controls PU, CORE (ARM), and SOC.
> And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB).
> This patch ad
Hi Jaein,
Which build are you using ? If it is tracking-panda build then we don't use
xloader instead we use the SPL which gets built from u-boot source.
Regards,
Vishal
On 8 March 2012 19:09, 송재인 wrote:
> Hi. I'm Jaein.
>
> I'm working with Pandaboard ES.
>
> Actually, I downloaded Android IC
Hi there,
There's considerable activity in the subject of the scheduler lately and how to
adapt it to the peculiarities of the new class of hardware coming out lately,
like the big.LITTLE class of devices from a number of manufacturers.
The platforms that Linux runs are very diverse, and run dif
Hi. I'm Jaein.
I'm working with Pandaboard ES.
Actually, I downloaded Android ICS Source code for that board.
But, I can't find x-loader source code that is first bootloader for
Pandaboard.
I want to modify x-loader, but I couldn't, because there is no code.
How can I get the x-loader source?
On Thu, Mar 08, 2012 at 09:58:23AM +, Richard Earnshaw wrote:
> On 02/03/12 21:15, Nicolas Pitre wrote:
> > [ coming back from vacation and trying to catch up ]
> >
> > On Wed, 29 Feb 2012, Dave Martin wrote:
> >
> >> Just had a chat with some tools guys -- apparently, when passing register
> >
> Assuming that some day OMAP code can be refactored to allow for lazy
> (or at least initcall-based) registration of clocks then perhaps your
> suggestion can take root. Which leads me to this question: are there
> any other platforms out there that require the level of expose to
> struct clk pre
Hi Chris,
On Wednesday 07 March 2012 08:29 PM, Chris Ball wrote:
Hi Rajendra,
On Wed, Mar 07 2012, Rajendra Nayak wrote:
Chris, Ping. I am basing my DT support patches on top of these cleanups.
Would be great if you can have a look and pull them in.
Chris, just realized the last two requests
Dear Chander Kashyap,
On 2 March 2012 22:25, Chander Kashyap wrote:
> Add exynos4_dmc structure in dmc.h for exynos4 dram controllor(DMC).
>
> Signed-off-by: Chander Kashyap
> ---
> arch/arm/include/asm/arch-exynos/dmc.h | 109
>
> 1 files changed, 109 inserti
On 02/03/12 21:15, Nicolas Pitre wrote:
> [ coming back from vacation and trying to catch up ]
>
> On Wed, 29 Feb 2012, Dave Martin wrote:
>
>> Just had a chat with some tools guys -- apparently, when passing register
>> arguments to gcc inline asms there really isn't a guarantee that those
>> vari
From: "Ying-Chun Liu (PaulLiu)"
Anatop is an integrated regulator inside i.MX6 SoC.
There are 3 digital regulators which controls PU, CORE (ARM), and SOC.
And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB).
This patch adds the Anatop regulator driver.
Signed-off-by: Nancy Chen
Signed-of
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