Hi Chander.
this patch is correct.
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Chander Kashyap wrote:
mmc data transfer width is set as following:
WIDE8[5]:
0 = Depend on WIDE4
1 = 8-bit mode
WIDE4[1]:
1 = 4-bit mode
0 = 1-bit mode
In case of 4-bit mode reset 8-bit mode
the results, i want to know them.
Regards,
Jaehoon Chung
Philip Rakity wrote:
On May 9, 2011, at 5:34 AM, Per Forlin wrote:
On 9 May 2011 04:05, Philip Rakity prak...@marvell.com wrote:
Hi Per,
We noticed on some of our systems if we ADMA or SDMA and a bounce buffer it
is significantly faster
Hi Per.
If you sketch a implementation for sdhci. i can test the patches on the Samsung
Soc
Your help is very nice for me :).i want to know how much improve the
performance
after applied your patch.
Regards,
Jaehoon Chung
Per Forlin wrote:
Hi Jaehoon,
Have you had the chance to test
