> From: linaro-dev-boun...@lists.linaro.org [mailto:linaro-dev-
> boun...@lists.linaro.org] On Behalf Of wireless
> Since Linaro is flapping loudly about Grub2, I should think that support for
> the
> modern file systems on the 64 Bit arm offerings would abound, such as ZFS,
> CEPH, GlusterFS, et
> From: Mans Rullgard [mailto:mans.rullg...@linaro.org]
> Sent: Sunday, November 27, 2011 6:26 PM
Hi,
> >>> By the way, do you know whether it is safe to use "SCU Speculative
> >>> linefills" with Cortex-A9 r2pX and PL310 r3pX?
> >>>
> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0407f/BA
> From: linaro-dev-boun...@lists.linaro.org [mailto:linaro-dev-
> boun...@lists.linaro.org] On Behalf Of Mans Rullgard
> >> Do you have an erratum number for this?
> >>
> > This was very recent BUG and not yet made it to the public errata
> > numbers. Most likely next PL310 errata update should h
> From: linux-arm-kernel-boun...@lists.infradead.org [mailto:linux-arm-
> kernel-boun...@lists.infradead.org] On Behalf Of Shilimkar, Santosh
> > With fixed IRQ migration and forcing CPU0 into an infinite WFI loop,
> > I can offline CPU0 and still have a running system.
> >
> The secure software
> From: linux-arm-kernel-boun...@lists.infradead.org [mailto:linux-arm-
> kernel-boun...@lists.infradead.org] On Behalf Of Russell King - ARM Linux
> On Wed, Jul 20, 2011 at 04:32:25PM -0700, Mike Turquette wrote:
> > A quick poll of the ARM platforms that implement CPU Hotplug support
> > shows
> From: linaro-dev-boun...@lists.linaro.org [mailto:linaro-dev-
> boun...@lists.linaro.org] On Behalf Of Christian Robottom Reis
> Sent: Wednesday, June 22, 2011 8:30 PM
> This suggests to me that a simple drop-in of libjpeg-turbo might be
> actually easy to do, and that there is probably a signi
Fred,
Do the kernel have and enable this code:
http://git.omapzoom.org/?p=kernel/omap.git;a=commitdiff;h=9069ca7aec1750b2e6362d7f4ffd44c4ed1f85e5
It may provide information on which entity was bugging the system.
You log shows failure from:
[1.947326] Unhandled fault: imprec
> From: Peter Maydell [mailto:peter.mayd...@linaro.org]
> Sent: Sunday, December 12, 2010 3:02 PM
> In case you're collecting things to clean up for the next issue,
> here's
> another :-) The Rev M OMAP35x TRM says on page 1139:
>
> "In both prefetch and write-posting modes, the engine respective
The underlying functional spec which TRM started from gives this description:
"In MPU filling mode, the FIFO status can be monitored through the FIFOPointer
or through the FIFOThresholdStatus bits in the GPMC_PREFETCH_STATUS register.
FIFOPointer indicates the current number of available free b
> From: linaro-dev-boun...@lists.linaro.org [mailto:linaro-dev-
> boun...@lists.linaro.org] On Behalf Of Dave Martin
> Sent: Tuesday, November 30, 2010 3:41 AM
> > * VFP uses the same register set. Does a floating point
> instruction
> > also turn the NEON coprocessor on?
>
> Yes-- these are one
> From: linaro-dev-boun...@lists.linaro.org [mailto:linaro-dev-
> boun...@lists.linaro.org] On Behalf Of Peter Maydell
> One of the Valgrind subtools is Cachegrind; this is a cache
> profiler. (It simulates the I1, D1 and L2 caches so it can
> pinpoint the sources of cache misses in application co
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