[PATCH v9] Regulator: Add Anatop regulator driver

2012-03-07 Thread Ying-Chun Liu (PaulLiu)
From: Ying-Chun Liu (PaulLiu) paul@linaro.org Anatop is an integrated regulator inside i.MX6 SoC. There are 3 digital regulators which controls PU, CORE (ARM), and SOC. And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB). This patch adds the Anatop regulator driver. Signed-off-by:

Re: [PATCH v9] Regulator: Add Anatop regulator driver

2012-03-07 Thread Mark Brown
On Wed, Mar 07, 2012 at 02:22:25PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote: +- compatible: Must be fsl,anatop-regulator +- vol-bit-shift: Bit shift for the register +- vol-bit-width: Number of bits used in the register +- min-bit-val: Minimum value of this register +-

Re: [PATCH v9] Regulator: Add Anatop regulator driver

2012-03-07 Thread Mark Brown
On Wed, Mar 07, 2012 at 04:36:22PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote: This really doesn't seem at all sane for a device which is already vendor specific, it's just noise in the bindings. No it's ...? Here is a good example as we have regulator generic binding vendor

Re: [PATCH v9] Regulator: Add Anatop regulator driver

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
On 21:24 Wed 07 Mar , Ying-Chun Liu (PaulLiu) wrote: From: Ying-Chun Liu (PaulLiu) paul@linaro.org Anatop is an integrated regulator inside i.MX6 SoC. There are 3 digital regulators which controls PU, CORE (ARM), and SOC. And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB).

Re: [PATCH v9] Regulator: Add Anatop regulator driver

2012-03-07 Thread Jean-Christophe PLAGNIOL-VILLARD
On 13:45 Wed 07 Mar , Mark Brown wrote: On Wed, Mar 07, 2012 at 02:22:25PM +0100, Jean-Christophe PLAGNIOL-VILLARD wrote: +- compatible: Must be fsl,anatop-regulator +- vol-bit-shift: Bit shift for the register +- vol-bit-width: Number of bits used in the register +-