On Tue, Jul 12, 2011 at 11:12:57AM +0100, Lorenzo Pieralisi wrote:
> Thank you very much Russell for this recap.
>
> On Mon, Jul 11, 2011 at 07:40:10PM +0100, Russell King - ARM Linux wrote:
> > On Mon, Jul 11, 2011 at 03:00:47PM +0100, Lorenzo Pieralisi wrote:
> > > Well, short answer is no. On S
Thank you very much Russell for this recap.
On Mon, Jul 11, 2011 at 07:40:10PM +0100, Russell King - ARM Linux wrote:
> On Mon, Jul 11, 2011 at 03:00:47PM +0100, Lorenzo Pieralisi wrote:
> > Well, short answer is no. On SMP we do need to save CPU registers
> > but if just one single cpu is shutdo
On 7/11/2011 1:14 PM, Russell King - ARM Linux wrote:
On Mon, Jul 11, 2011 at 01:05:20PM -0700, Santosh Shilimkar wrote:
(Just to add few more points on top of what Colin already commented)
On 7/11/2011 11:40 AM, Russell King - ARM Linux wrote:
On Mon, Jul 11, 2011 at 03:00:47PM +0100, Lorenzo
On Mon, Jul 11, 2011 at 01:05:20PM -0700, Santosh Shilimkar wrote:
> (Just to add few more points on top of what Colin already commented)
>
> On 7/11/2011 11:40 AM, Russell King - ARM Linux wrote:
>> On Mon, Jul 11, 2011 at 03:00:47PM +0100, Lorenzo Pieralisi wrote:
>>> Well, short answer is no. On
On 7/11/2011 12:19 PM, Russell King - ARM Linux wrote:
On Mon, Jul 11, 2011 at 11:51:00AM -0700, Colin Cross wrote:
On Mon, Jul 11, 2011 at 11:40 AM, Russell King - ARM Linux
wrote:
On Mon, Jul 11, 2011 at 03:00:47PM +0100, Lorenzo Pieralisi wrote:
Well, short answer is no. On SMP we do need
(Just to add few more points on top of what Colin already commented)
On 7/11/2011 11:40 AM, Russell King - ARM Linux wrote:
On Mon, Jul 11, 2011 at 03:00:47PM +0100, Lorenzo Pieralisi wrote:
Well, short answer is no. On SMP we do need to save CPU registers
but if just one single cpu is shutdown
On Mon, Jul 11, 2011 at 12:19 PM, Russell King - ARM Linux
wrote:
> On Mon, Jul 11, 2011 at 11:51:00AM -0700, Colin Cross wrote:
>> On Mon, Jul 11, 2011 at 11:40 AM, Russell King - ARM Linux
>> wrote:
>> > On Mon, Jul 11, 2011 at 03:00:47PM +0100, Lorenzo Pieralisi wrote:
>> >> Well, short answer
On Mon, Jul 11, 2011 at 11:51:00AM -0700, Colin Cross wrote:
> On Mon, Jul 11, 2011 at 11:40 AM, Russell King - ARM Linux
> wrote:
> > On Mon, Jul 11, 2011 at 03:00:47PM +0100, Lorenzo Pieralisi wrote:
> >> Well, short answer is no. On SMP we do need to save CPU registers
> >> but if just one sing
On Mon, Jul 11, 2011 at 11:40 AM, Russell King - ARM Linux
wrote:
> On Mon, Jul 11, 2011 at 03:00:47PM +0100, Lorenzo Pieralisi wrote:
>> Well, short answer is no. On SMP we do need to save CPU registers
>> but if just one single cpu is shutdown L2 is still on.
>> cpu_suspend saves regs on the sta
On Mon, Jul 11, 2011 at 03:00:47PM +0100, Lorenzo Pieralisi wrote:
> Well, short answer is no. On SMP we do need to save CPU registers
> but if just one single cpu is shutdown L2 is still on.
> cpu_suspend saves regs on the stack that has to be cleaned from
> L2 before shutting a CPU down which m
On Mon, Jul 11, 2011 at 05:57:29PM +0100, Frank Hofmann wrote:
> On Mon, 11 Jul 2011, Lorenzo Pieralisi wrote:
>
> [ ... ]
> >>> The array of pointers is there to save pgdir on idle entry, one per-cpu.
> >>
> >> If you're going through cpu_{do_}suspend/resume, the TTBRs are
> >> saved/restored any
On Mon, 11 Jul 2011, Lorenzo Pieralisi wrote:
[ ... ]
The array of pointers is there to save pgdir on idle entry, one per-cpu.
If you're going through cpu_{do_}suspend/resume, the TTBRs are
saved/restored anyway, what do you need to keep the virtual addresses
around for ?
Because I switch m
On Mon, Jul 11, 2011 at 03:31:30PM +0100, Frank Hofmann wrote:
>
>
> On Mon, 11 Jul 2011, Lorenzo Pieralisi wrote:
>
> > On Fri, Jul 08, 2011 at 05:12:22PM +0100, Frank Hofmann wrote:
> >> Hi Lorenzo,
> >>
> >> only a few comments at this stage.
> >>
[...]
> >> How much memory do all the paged
On Sat, Jul 09, 2011 at 09:45:08AM +0100, Russell King - ARM Linux wrote:
> On Sat, Jul 09, 2011 at 09:38:15AM +0100, Russell King - ARM Linux wrote:
> > On Thu, Jul 07, 2011 at 04:50:18PM +0100, Lorenzo Pieralisi wrote:
> > > +static int late_init(void)
> > > +{
> > > + int rc;
> > > + struct sr_c
On Mon, 11 Jul 2011, Lorenzo Pieralisi wrote:
On Fri, Jul 08, 2011 at 05:12:22PM +0100, Frank Hofmann wrote:
Hi Lorenzo,
only a few comments at this stage.
The sr_entry.S code is both exclusively .arm (using conditionals and
long-distance adr, i.e. not Thumb2-clean), and it uses post-armv5
On Fri, Jul 08, 2011 at 05:12:22PM +0100, Frank Hofmann wrote:
> Hi Lorenzo,
>
> only a few comments at this stage.
>
> The sr_entry.S code is both exclusively .arm (using conditionals and
> long-distance adr, i.e. not Thumb2-clean), and it uses post-armv5
> instructions (like wfi). Same for the
On Sat, Jul 09, 2011 at 09:38:15AM +0100, Russell King - ARM Linux wrote:
> On Thu, Jul 07, 2011 at 04:50:18PM +0100, Lorenzo Pieralisi wrote:
> > +static int late_init(void)
> > +{
> > + int rc;
> > + struct sr_cluster *cluster;
> > + int cluster_index, cpu_index = sr_platform_get_cpu_index(
On Thu, Jul 07, 2011 at 04:50:18PM +0100, Lorenzo Pieralisi wrote:
> +static int late_init(void)
> +{
> + int rc;
> + struct sr_cluster *cluster;
> + int cluster_index, cpu_index = sr_platform_get_cpu_index();
Stop this madness, and use the standard linux APIs like smp_processor_id
her
Hi Lorenzo,
only a few comments at this stage.
The sr_entry.S code is both exclusively .arm (using conditionals and
long-distance adr, i.e. not Thumb2-clean), and it uses post-armv5
instructions (like wfi). Same for the other *.S code in the patch series.
It's non-generic assembly within arch
Hi Santosh,
Thanks for looking at this series.
On Fri, Jul 08, 2011 at 02:45:43AM +0100, Santosh Shilimkar wrote:
> On 7/7/2011 8:50 AM, Lorenzo Pieralisi wrote:
> > In order to define a common idle interface for the kernel
> > to enter low power modes, this patch provides include files
> > and c
On 7/7/2011 8:50 AM, Lorenzo Pieralisi wrote:
In order to define a common idle interface for the kernel
to enter low power modes, this patch provides include files
and code that manages OS calls for low power entry and exit.
[]
diff --git a/arch/arm/kernel/sr_entry.S b/arch/arm/kernel/sr
In order to define a common idle interface for the kernel
to enter low power modes, this patch provides include files
and code that manages OS calls for low power entry and exit.
In ARM world processor HW is categorized as CPU and Cluster.
Corresponding states defined by this common IF are:
C-st
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