lin...@uds sessions

2010-10-18 Thread Michael Hope
Hi there. I've updated the list of potential Summit sessions based on yesterdays call. Could people please check the Sessions table on https://wiki.linaro.org/WorkingGroups/ToolChain/Meetings/2010-10-18 and flesh out the agenda for sessions that have your name against them. The agenda should b

Re: Flavoured toolchains anyone?

2010-10-18 Thread Michael Hope
I like it. Any chance of flavouring -mcpu= or -mtune= to set the compiler to A9 by default as well? -- Michael On Tue, Oct 19, 2010 at 2:44 AM, Marcin Juszkiewicz wrote: > > Some of Linaro developers works with ARM devices older then ARMv7-a > architecture. Other people experiments with hard-fl

Flavoured toolchains anyone?

2010-10-18 Thread Marcin Juszkiewicz
Some of Linaro developers works with ARM devices older then ARMv7-a architecture. Other people experiments with hard-float ABI. Each of them has to rebuild toolchain for own use and that means playing with components to have them build properly. But it is no more - I made some patches and arme

Re: NEON vectorization: use of specialized load/store instructions

2010-10-18 Thread Joseph S. Myers
On Mon, 18 Oct 2010, Ira Rosen wrote: > > > Does that mean that the vectorizer will be aware of specific > instructions? > > > > I would imagine that it would need to know what permutations are > > available, yes (GIMPLE and RTL would have some form of general permuting > > load/store operation, w

Re: NEON vectorization: use of specialized load/store instructions

2010-10-18 Thread Ira Rosen
Joseph Myers wrote on 14/10/2010 05:18:37 PM: > On Thu, 14 Oct 2010, Ira Rosen wrote: > > > Let me check that I understand the problem first: the problem is that VLD1 > > and VST1 instructions in big endian mode follow the array numbering of > > elements, while all other memory instructions (VL

Flavoured toolchains anyone?

2010-10-18 Thread Marcin Juszkiewicz
Some of Linaro developers works with ARM devices older then ARMv7-a architecture. Other people experiments with hard-float ABI. Each of them has to rebuild toolchain for own use and that means playing with components to have them build properly. But it is no more - I made some patches and arme

Re: Plan of CS304: Thumb2 tuning investigation

2010-10-18 Thread Yao Qi
On 10/05/2010 10:01 PM, Yao Qi wrote: > > - Fix speed regression > I found speed regression on EEMBC on linaro 4.5, compared with FSF GCC > 4.5.0, and I'll investigate why speed regression happens on these cases. > Here is a table below about speed regression compared between FSF GCC > 4.5.0 and