so do
it only for UART core.
Signed-off-by: Pramod Gurav gpra...@codeaurora.org
--
Changes since last version:
- Added new macro fo UART_DM_MR1_AUTO_RFR_LEVEL1 instead of modifying existing.
- Added a new macro for IPR register as it is also different in UART_DM
- Changed subject line
so do
it only for UART core.
Signed-off-by: Pramod Gurav gpra...@codeaurora.org
---
Changes since last version:
- Added new macro fo UART_DM_MR1_AUTO_RFR_LEVEL1 instead of modifying existing.
- Added a new macro for IPR register as it is also different in UART_DM
- Changed subject line
Disable the pclk when tty port is closed by user space.
Signed-off-by: Pramod Gurav gpra...@codeaurora.org
---
drivers/tty/serial/msm_serial.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index 4c1e9ea..f38565c 100644
Disable the pclk when tty port is closed by user space.
Signed-off-by: Pramod Gurav gpra...@codeaurora.org
---
drivers/tty/serial/msm_serial.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index 4c1e9ea..f38565c 100644
On Thu, April 9, 2015 5:21 am, Stephen Boyd wrote:
On 04/08/15 06:28, Pramod Gurav wrote:
Disable the pclk when tty port is closed by user space.
Signed-off-by: Pramod Gurav gpra...@codeaurora.org
---
drivers/tty/serial/msm_serial.c | 1 +
1 file changed, 1 insertion(+)
diff --git
According to documents The RFR_LEVEL1 in UART_DM_MR1 can be
programmed in bits 31:8 but the masks only bits 17:8.
Correct the same.
Signed-off-by: Pramod Gurav gpra...@codeaurora.org
---
drivers/tty/serial/msm_serial.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers
Calls tasklet_kill() in error path of the probe function were missing.
Add the same in error path.
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
Resending it with linux-arm-msm in cc.
drivers/dma/qcom_bam_dma.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions
Hi Andy,
A minor doubt.
On Thursday 08 January 2015 08:56 AM, Andy Gross wrote:
Signed-off-by: Andy Gross agr...@codeaurora.org
---
drivers/dma/Kconfig| 10 +
drivers/dma/Makefile |1 +
drivers/dma/qcom_adm.c | 899
snip
+
+
unregister_console() will be called from uart_remove_one_port() while
removing the platform driver. So not necessary to call it in driver
exit path.
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/tty/serial/msm_serial.c |3 ---
1 file changed, 3 deletions(-)
diff --git
Hi Stephen,
On Friday 09 January 2015 03:16 AM, Stephen Boyd wrote:
On 01/08/2015 01:15 AM, Pramod Gurav wrote:
drivers/tty/serial/msm_serial.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/drivers/tty/serial/msm_serial.c
b/drivers/tty/serial/msm_serial.c
index
Hi Stephen,
On Friday 09 January 2015 03:16 AM, Stephen Boyd wrote:
On 01/08/2015 01:15 AM, Pramod Gurav wrote:
drivers/tty/serial/msm_serial.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/drivers/tty/serial/msm_serial.c
b/drivers/tty/serial/msm_serial.c
index
the baud rate.
Hence doing away with both of these calls.
- CR_CMD_PROTECTION_EN and CR_TX_ENABLE settings are done in msm_set_baud_rate.
So do away with this here.
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
Changes since v1:
- v1 was just removing call to msm_set_baud_rate
+linux-arm-msm
On Monday 20 October 2014 05:09 PM, Pramod Gurav wrote:
This changes muxes in gpio26 pin to function as gpio and adds support
for sd card detect for apq8064 based IFC6410 board.
Cc: Rob Herring robh...@kernel.org
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl
On Tuesday 30 September 2014 03:44 AM, Andy Gross wrote:
On Mon, Sep 29, 2014 at 10:03:07AM +0530, Archit Taneja wrote:
The BAM DMA IP comes in different versions. The register offset layout varies
among these versions. The layouts depend on which generation/family of SoCs
they
belong to.
Hi Lina,
After enabling CONFIG_DEBUG_SECTION_MISMATCH I see few section mismatch
warnings like:
WARNING: drivers/soc/qcom/built-in.o(.text+0x2f0): Section mismatch in
reference from the function spm_dev_probe() to the (unknown reference)
.init.rodata:(unknown)
The function spm_dev_probe()
Hi Lina
One sections mismatch warning here as well:
WARNING: drivers/cpuidle/built-in.o(.text+0x2740): Section mismatch in
reference from the function qcom_cpuidle_probe() to the (unknown
reference) .init.rodata:(unknown)
The function qcom_cpuidle_probe() references
the (unknown reference)
Hi Lina,
Thanks for the patches. Tested these patches on my Dragonboard APQ8074
and with cpuidle tests from Linaro. They all pass.
And the proper names of the cpuidle state (wfi and spc) are also
reflecting in sysfs.
Tested-by: pramod.gu...@smartplayin.com.
Thanks
Pramod
On Saturday 27
On 27-09-2014 06:28 AM, Lina Iyer wrote:
Based on work by many authors, available at codeaurora.org
..
+int qcom_spm_set_low_power_mode(enum spm_mode mode)
+{
+ struct spm_driver_data *drv = __get_cpu_var(cpu_spm_drv);
+ u32 start_addr = 0;
initialization not necessary.
+
On 27-09-2014 06:28 AM, Lina Iyer wrote:
..
+}
+
+static struct platform_driver qcom_cpuidle_plat_driver = {
+ .probe = qcom_cpuidle_probe,
+ .driver = {
+ .name = qcom_cpuidle,
+ .owner = THIS_MODULE,
.owner field can be removed here, as for drivers
On 27-09-2014 06:28 AM, Lina Iyer wrote:
Based on work by many authors, available at codeaurora.org
Add interface layer to abstract and handle hardware specific
functionality for executing various cpu low power modes in QCOM
chipsets.
..
+#include soc/qcom/scm-boot.h
+#include
@vger.kernel.org
Cc: Georgi Djakov gdja...@mm-sol.com
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
arch/arm/configs/multi_v7_defconfig |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_defconfig
index bad9d92
On 27-09-2014 01:55 AM, Sebastian Reichel wrote:
Hi,
On Thu, Sep 25, 2014 at 05:03:51PM +0530, Pramod Gurav wrote:
This change replaces use of arm_pm_restart with recently introduced
reset mechanism in Linux kernel called restart_notifier.
Choosing priority 128, which is default priority
-by: Stephen Boyd sb...@codeaurora.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
Why reset handler in pinctrl-msm wont collide with reset
in poweroff-msm.c in this patch:
In case of apq8064, the ps_hold register region is owned by
pinctrl hence the reset is implemented in pinctrl
This change adds support for reset driver for apq8074 based platform.
With this we should be able to reboot the board from command prompt.
Cc: Russell King li...@arm.linux.org.uk
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-arm-msm@vger.kernel.org
Signed-off-by: Pramod Gurav pramod.gu
Hi Lina,
On Wednesday 24 September 2014 05:21 AM, Lina Iyer wrote:
Add SPM device bindings for QCOM 8974 based cpus. SPM is the sub-system
power manager and controls the logic around the cores (cpu and L2).
Each core has an instance of SPM and controls only that core. Each cpu
SPM is
+linux-arm-msm
On Tuesday 23 September 2014 11:38 AM, Pramod Gurav wrote:
This change replaces use of arm_pm_restart with recently introduced
reset mechanism in Linux kernel called restart_notifier.
Reviewed-by: Guenter Roeck li...@roeck-us.net
Cc: Guenter Roeck li...@roeck-us.net
Cc: Josh
: David Woodhouse dw...@infradead.org
Cc: Stephen Boyd sb...@codeaurora.org
Cc: linux...@vger.kernel.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
Tested on Dragonboard APQ8074
Changes since v1:
- Initialized restart_nb with its declaration
- Removed return check
: David Woodhouse dw...@infradead.org
Cc: Stephen Boyd sb...@codeaurora.org
Cc: linux...@vger.kernel.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
This patch is tested on DB8074 Target and are based on patchset [1]
by Guenter Roeck.
[1]: https://patchwork.kernel.org/patch
Hi Guenter,
Thanks for you.
On 19-09-2014 07:23 PM, Guenter Roeck wrote:
On 09/19/2014 05:06 AM, Pramod Gurav wrote:
This change uses replaces use of arm_pm_restart with recently introduced
reset mechanism in Linux kernel called restart_notifier.
Cc: Guenter Roeck li...@roeck-us.net
Cc
Hi Srini,
Thanks for the patch.
Tested-by: Pramod Gurav pramod.gu...@smartplayin.com
A minor nit.
On Wednesday 17 September 2014 11:06 AM, Srinivas Kandagatla wrote:
This patch adds memory details of IFC6410 as this is necessary to
fix the in-correct memory start comming from ATAGs.
Signed
Hansson ulf.hans...@linaro.org
CC: linux-...@vger.kernel.org
CC: linux-arm-msm@vger.kernel.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/mmc/host/msm_sdcc.c | 43 +--
1 file changed, 17 insertions(+), 26 deletions(-)
diff --git
Hansson ulf.hans...@linaro.org
CC: linux-...@vger.kernel.org
CC: linux-arm-msm@vger.kernel.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/mmc/host/msm_sdcc.c | 43 +--
1 file changed, 17 insertions(+), 26 deletions(-)
diff --git
Hansson ulf.hans...@linaro.org
CC: linux-...@vger.kernel.org
CC: linux-arm-msm@vger.kernel.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/mmc/host/msm_sdcc.c |3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/mmc/host/msm_sdcc.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index 2b8ac9c..3e0536d 100644
--- a/drivers/mmc/host/msm_sdcc.c
+++ b/drivers/mmc
: linux-arm-msm@vger.kernel.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/mmc/host/msm_sdcc.c | 34 ++
1 file changed, 18 insertions(+), 16 deletions(-)
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index 3e0536d
-...@vger.kernel.org
CC: linux-arm-msm@vger.kernel.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/mmc/host/msm_sdcc.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/mmc/host/msm_sdcc.c b/drivers/mmc/host/msm_sdcc.c
index
version of mmci driver.
From v3.17 mmci driver added support for qualcomm specific customization to
pl180.
So msm platform should be able to use pl180 mmci driver, rather than using
msm_sdcc.
Thanks,
srini
On 16/09/14 12:15, Pramod Gurav wrote:
This change makes changes to use managed
Hi Felipe,
On 13-09-2014 01:50 AM, Felipe Balbi wrote:
On Sat, Sep 13, 2014 at 01:44:25AM +0530, Pramod Gurav wrote:
Andy,
Couple of minor comments.
On Sat, Sep 13, 2014 at 12:58 AM, Andy Gross agr...@codeaurora.org wrote:
From: Ivan T. Ivanov iiva...@mm-sol.com
DWC3 glue layer
On 13-09-2014 01:59 AM, Felipe Balbi wrote:
Hi,
On Sat, Sep 13, 2014 at 01:55:50AM +0530, Pramod Gurav wrote:
+ qdwc = devm_kzalloc(pdev-dev, sizeof(*qdwc), GFP_KERNEL);
+ if (!qdwc)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, qdwc);
+
+ qdwc
on all cpus.
So,
Tested-by: Pramod Gurav pramod.gu...@smartplayin.com
I have a comment/observation only on name entry for each state which
reflects only cpu-idle-state- as Lorenzo dt-idle driver limits
CPUIDLE_NAME_LEN to 16.
Thanks
Pramod.
On Friday 05 September 2014 04:05 AM, Lina Iyer wrote
Hi Stephen,
Looks like one patch is missing from v1. Is this removed from v2
patchset from some reason?
ARM: Add Krait L2 register accessor functions
But there are references to this in v2 set and build fails while
compiling drivers/clk/qcom/clk-krait.c.
Thanks and Regards
Pramod
On
Hi Lina,
On Friday 05 September 2014 04:05 AM, Lina Iyer wrote:
drivers/soc/qcom/spm.c | 192
+
3 files changed, 262 insertions(+)
create mode 100644 drivers/soc/qcom/spm-drv.h
create mode 100644 drivers/soc/qcom/spm.c
diff --git
Sorry Stephen for spaming.
I read the full patch cover letter and found your note. Somehow I missed
on that.
Thanks
Pramod
On Monday 08 September 2014 03:12 PM, Pramod Gurav wrote:
Hi Stephen,
Looks like one patch is missing from v1. Is this removed from v2
patchset from some reason
On 29-08-2014 09:19 AM, Bjorn Andersson wrote:
On Thu 28 Aug 00:13 PDT 2014, Pramod Gurav wrote:
On Thursday 28 August 2014 02:54 AM, Bjorn Andersson wrote:
On Wed, Aug 27, 2014 at 3:57 AM, Pramod Gurav
pramod.gu...@smartplayin.com wrote:
This patches adds a call
This patch releases gpiochip related resources by calling
gpiochip_remove when either of gpiochip_add_pin_range and
gpiochip_irqchip_add fails.
CC: Linus Walleij linus.wall...@linaro.org
CC: Bjorn Andersson bjorn.anders...@sonymobile.com
CC: Ivan T. Ivanov iiva...@mm-sol.com
Signed-off-by: Pramod
Hi Bjorn,
On 29-08-2014 06:58 AM, Bjorn Andersson wrote:
On Thu 28 Aug 20:22 PDT 2014, Pramod Gurav wrote:
This patch adds support for reset functions to reboot the boards
with soc apq8064.
CC: Linus Walleij linus.wall...@linaro.org
CC: Bjorn Andersson bjorn.anders...@sonymobile.com
CC
since v1 to v2:
1. Added #error log as suggested by Kumar Gala
2. Correct interrupts in DT from 32 to 16 based on Bjorn's new patch in bindings
3. Replaced hardcoding in DT with IRQ_TYPE_LEVEL_HIGH for interrupt level type
Pramod Gurav (4):
ARM: DT: APQ8064: Add pinctrl support
ARM: DT
-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/pinctrl/qcom/pinctrl-apq8064.c |7 ++-
drivers/pinctrl/qcom/pinctrl-msm.c | 30 ++
2 files changed, 36 insertions(+), 1 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-apq8064.c
b
-sol.com
CC: Stephen Boyd sb...@codeaurora.org
CC: Andy Gross agr...@codeaurora.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
.../bindings/pinctrl/qcom,apq8064-pinctrl.txt |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/Documentation/devicetree
: linux-arm-ker...@lists.infradead.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index
Hi Bjorn,
On 30-08-2014 12:27 AM, Bjorn Andersson wrote:
On Fri 29 Aug 01:11 PDT 2014, Pramod Gurav wrote:
This patch releases gpiochip related resources by calling
gpiochip_remove when either of gpiochip_add_pin_range and
gpiochip_irqchip_add fails.
CC: Linus Walleij linus.wall
Hi Bjorn,
On 30-08-2014 12:27 AM, Bjorn Andersson wrote:
On Fri 29 Aug 01:11 PDT 2014, Pramod Gurav wrote:
This patch releases gpiochip related resources by calling
gpiochip_remove when either of gpiochip_add_pin_range and
gpiochip_irqchip_add fails.
CC: Linus Walleij linus.wall
Bjorn,
Thanks for review. :)
On 30-08-2014 12:12 AM, Bjorn Andersson wrote:
On Fri 29 Aug 07:30 PDT 2014, Pramod Gurav wrote:
This patch adds support for reset functions to reboot the boards
with soc apq8064.
CC: Linus Walleij linus.wall...@linaro.org
CC: Bjorn Andersson bjorn.anders
On Thursday 28 August 2014 02:54 AM, Bjorn Andersson wrote:
On Wed, Aug 27, 2014 at 3:57 AM, Pramod Gurav
pramod.gu...@smartplayin.com wrote:
This patches adds a call to gpiochip_remove_pin_ranges when
gpiochip_irqchip_add fails to release memory allocated for pin_ranges.
diff --git
by Kumar Gala
2. Correct interrupts in DT from 32 to 16 based on Bjorn's new patch in bindings
3. Replaced hardcoding in DT with IRQ_TYPE_LEVEL_HIGH for interrupt level type
Pramod Gurav (4):
ARM: DT: APQ8064: Add pinctrl support
ARM: DT: APQ8064: Add node for ps_hold function in pinctrl
pinctrl
-sol.com
CC: Stephen Boyd sb...@codeaurora.org
CC: Andy Gross agr...@codeaurora.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
.../bindings/pinctrl/qcom,apq8064-pinctrl.txt |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/Documentation/devicetree/bindings
-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/pinctrl/qcom/pinctrl-apq8064.c |7 +-
drivers/pinctrl/qcom/pinctrl-msm.c | 38
2 files changed, 44 insertions(+), 1 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-apq8064.c
b
...@vger.kernel.org
CC: linux-arm-ker...@lists.infradead.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064
: linux-arm-ker...@lists.infradead.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 11 +++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index
-sol.com
CC: Stephen Boyd sb...@codeaurora.org
CC: Andy Gross agr...@codeaurora.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
.../bindings/pinctrl/qcom,apq8064-pinctrl.txt |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings
...@vger.kernel.org
CC: linux-arm-ker...@lists.infradead.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 681e194
This patches adds a call to gpiochip_remove_pin_ranges when
gpiochip_irqchip_add fails to release memory allocated for pin_ranges.
CC: Ivan T. Ivanov iiva...@mm-sol.com
CC: Bjorn Andersson bjorn.anders...@sonymobile.com
CC: Linus Walleij linus.wall...@linaro.org
Signed-off-by: Pramod Gurav
This function releases clk and regulator in remove function for clean
unloading.
CC: Shawn Guo shawn@linaro.org
CC: Rafael J. Wysocki r...@rjwysocki.net
CC: Viresh Kumar viresh.ku...@linaro.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/cpufreq/cpufreq-cpu0.c |2
CC: Shawn Guo shawn@linaro.org
CC: Rafael J. Wysocki r...@rjwysocki.net
CC: Viresh Kumar viresh.ku...@linaro.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/cpufreq/cpufreq-cpu0.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git
This removes unnecessary IS_ERR check on clk when in failure path
as execution wont reach till there with clk being a err.
CC: Shawn Guo shawn@linaro.org
CC: Rafael J. Wysocki r...@rjwysocki.net
CC: Viresh Kumar viresh.ku...@linaro.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
CC: Rob Herring robh...@kernel.org
CC: Pawel Moll pawel.m...@arm.com
CC: Mark Rutland mark.rutl...@arm.com
CC: Ian Campbell ijc+devicet...@hellion.org.uk
CC: Kumar Gala ga...@codeaurora.org
CC: devicet...@vger.kernel.org
CC: linux-arm-ker...@lists.infradead.org
Signed-off-by: Pramod Gurav
-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/pinctrl/qcom/pinctrl-apq8064.c |7 +-
drivers/pinctrl/qcom/pinctrl-msm.c | 36
2 files changed, 42 insertions(+), 1 deletions(-)
diff --git a/drivers/pinctrl/qcom/pinctrl-apq8064.c
b
Hi Lina,
Compilation breaks while I try to compile these driver. Find below the
comments.
On Tuesday 19 August 2014 03:53 AM, Lina Iyer wrote:
Add cpuidle driver interface to allow cpus to go into C-States.
Use the cpuidle DT interfacecommon across ARM architectures to provide
the C-State
On Tuesday 19 August 2014 08:24 PM, Lina Iyer wrote:
+config ARM_QCOM_CPUIDLE
+bool CPU Idle drivers for Qualcomm processors
+depends on QCOM_PM
+select DT_IDLE_STATES
I see no reference to this in any patch? Moreover it was not there in
v2. Anything new that you
On Wednesday 13 August 2014 01:13 AM, Lina Iyer wrote:
Add CPU phandle labels for all Krait CPUS.
Signed-off-by: Lina Iyer lina.i...@linaro.org
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
Hi Lina,
These changes are already done
On Wednesday 13 August 2014 01:13 AM, Lina Iyer wrote:
Quad core targets like APQ8074, APQ8064, APQ8084 need SCM support set up
warm boot addresses in the Secure Monitor. Extend the SCM flags to
support warmboot addresses for seconday cores.
Signed-off-by: Lina Iyer lina.i...@linaro.org
---
On Wednesday 13 August 2014 01:13 AM, Lina Iyer wrote:
Qualcomm chipsets use an separate h/w block to control the logic around
the processor cores (cpu and L2). The SPM h/w block regulates power to
the cores and controls the power when the core enter low power modes.
Each core has its own
On Wednesday 13 August 2014 01:13 AM, Lina Iyer wrote:
Add interface layer to abstract and handle hardware specific
functionality for executing various cpu low power modes in QCOM
chipsets.
Signed-off-by: Venkat Devarasetty vdeva...@codeaurora.org
Signed-off-by: Mahesh Sivasubramanian
Hi Lina,
On Friday 08 August 2014 09:35 AM, Lina Iyer wrote:
Signed-off-by: Lina Iyer lina.i...@linaro.org
---
arch/arm/mach-qcom/Makefile | 1 -
drivers/soc/qcom/Makefile | 2 +-
{arch/arm/mach-qcom = drivers/soc/qcom}/scm-boot.c | 4 ++--
Hi Lina,
On Friday 08 August 2014 09:35 AM, Lina Iyer wrote:
Qualcomm chipsets use an separate h/w block to control the logic around
the processor cores (cpu and L2). The SPM h/w block regulates power to
the cores and controls the power when the core enter low power modes.
Each core has its
Hello Lina,
Sorry for spaming, Should have applied all of them.
On Friday 08 August 2014 02:48 PM, Pramod Gurav wrote:
Hi Lina,
On Friday 08 August 2014 09:35 AM, Lina Iyer wrote:
Qualcomm chipsets use an separate h/w block to control the logic around
the processor cores (cpu and L2
...@linaro.org
Bjorn Andersson bjorn.anders...@sonymobile.com
Andy Gross agr...@codeaurora.org
Ivan T. Ivanov iiva...@mm-sol.com
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
drivers/i2c/busses/i2c-qup.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers
...@linaro.org
CC: Bjorn Andersson bjorn.anders...@sonymobile.com
CC: Andy Gross agr...@codeaurora.org
CC: Ivan T. Ivanov iiva...@mm-sol.com
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
Resending the patch by updating CCs list.
drivers/i2c/busses/i2c-qup.c | 12
1 file
grant.lik...@linaro.org
CC: Bjorn Andersson bjorn.anders...@sonymobile.com
CC: Andy Gross agr...@codeaurora.org
CC: Ivan T. Ivanov iiva...@mm-sol.com
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
---
Resending the patch by updating CCs list.
Fixed Typos in commit message noticed
Hi Stanimir.
On Friday 01 August 2014 08:00 PM, Stanimir Varbanov wrote:
Hello all,
Changes since v3:
- rename the driver to qcom-spmi-pmic - suggested by David Collins
- spmi regmap config now initialize .fast_io to true
- added generalized comptatible string in DT binding document and
This switches the driver to using managed resources to simplify error
handling and to do away with remove function.
CC: Stepan Moskovchenko step...@codeaurora.org
CC: Joerg Roedel j...@8bytes.org
CC: Stephen Boyd sb...@codeaurora.org
Signed-off-by: Pramod Gurav pramod.gu...@smartplayin.com
On Mon, Jul 21, 2014 at 9:32 PM, divya ojha odivy...@gmail.com wrote:
Hi,
On Thu, Jul 17, 2014 at 8:55 PM, Ivan T. Ivanov iiva...@mm-sol.com wrote:
From: Ivan T. Ivanov iiva...@mm-sol.com
This is the pinctrl, pinmux, pinconf and gpiolib driver for the
Qualcomm GPIO and MPP sub-function
+Mark Brown
Hi Josh/Stanimir,
On Tue, Jul 8, 2014 at 9:24 PM, Stanimir Varbanov svarba...@mm-sol.com wrote:
From: Josh Cartwright jo...@codeaurora.org
The Qualcomm QPNP PMIC chips are components used with the
Snapdragon 800 series SoC family. This driver exists
.
[SNIP]
.
+config
On Thu, Jul 17, 2014 at 3:50 AM, Bjorn Andersson bj...@kryo.se wrote:
On Wed, Jul 16, 2014 at 4:30 AM, Bjorn Andersson
bjorn.anders...@sonymobile.com wrote:
[...]
+ rpm@108000 {
+ compatible = qcom,rpm-msm8960;
+ reg = 0x108000 0x1000;
+
Hi Bjorn,
On Wed, Jul 16, 2014 at 4:30 AM, Bjorn Andersson
bjorn.anders...@sonymobile.com wrote:
Driver for the Resource Power Manager (RPM) found in Qualcomm 8660, 8960
and 8064 based devices. The driver exposes resources that child drivers
can operate on; to implementing regulator, clock and
Hi Bjorn,
On Wed, Jul 16, 2014 at 4:30 AM, Bjorn Andersson
bjorn.anders...@sonymobile.com wrote:
Driver for regulators exposed by the Resource Power Manager (RPM) found
in Qualcomm 8660, 8960 and 8064 based devices.
Signed-off-by: Bjorn Andersson bjorn.anders...@sonymobile.com
---
Hi Bjorn,
RPM breaks on IFC6410 without entry for 'qcom.ipc' node. Please find
my observations below.
On Wed, Jul 16, 2014 at 4:30 AM, Bjorn Andersson
bjorn.anders...@sonymobile.com wrote:
Add binding for the Qualcomm Resource Power Manager (RPM) found in 8660,
8960 and 8064 based devices. The
Hi,
On Wednesday, 16 July, 2014 5:37pm, Stanimir Varbanov svarba...@mm-sol.com
said:
Hi,
snip
Signed-off-by: Pramod Gurav pramod.gurav@gmail.com
CC: Josh Cartwright jo...@codeaurora.org
CC: Mark Brown broo...@linaro.org
---
This was found when I enabled support for Qualcomm QPNP
Hi,
On Wednesday, 16 July, 2014 5:55pm, Stanimir Varbanov svarba...@mm-sol.com
said:
snip
config REGMAP_SPMI
+ select SPMI
NO, IMO the CONFIG_SPMI should be enabled by qcom_defconfig and
multi_v7_defconfig. See CONFIG_I2C and REGMAP_I2C for example.
I am using multi_v7_defconfig
On Wed, Jul 16, 2014 at 7:48 PM, Mark Brown broo...@kernel.org wrote:
On Wed, Jul 16, 2014 at 05:00:54PM +0300, Ivan T. Ivanov wrote:
On Wed, 2014-07-16 at 14:53 +0100, Mark Brown wrote:
No, this isn't an either/or thing - the dependency is absolutely
mandatory if the device needs SPMI.
Hi Stephen,
On Wed, Jun 25, 2014 at 5:36 AM, Stephen Boyd sb...@codeaurora.org wrote:
Stephen Boyd (12):
ARM: Add Krait L2 register accessor functions
clk: Add safe switch hook
clk: qcom: Add support for muxes, dividers, and mux dividers
clk: qcom: Add support for High-Frequency
On Tue, Jul 8, 2014 at 9:24 PM, Stanimir Varbanov svarba...@mm-sol.com wrote:
From: Josh Cartwright jo...@codeaurora.org
The Qualcomm QPNP PMIC chips are components used with the
Snapdragon 800 series SoC family. This driver exists
largely as a glue mfd component, it exists to be an owner
Hi Stephen,
On Wed, Jun 25, 2014 at 5:36 AM, Stephen Boyd sb...@codeaurora.org wrote:
The Krait CPU clocks are made up of muxes and dividers with a
handful of sources. Add a set of clk_ops that allow us to
configure these clocks so we can support CPU frequency scaling on
Krait CPUs.
Based
Hi Stephen,
On Wed, Jun 25, 2014 at 5:36 AM, Stephen Boyd sb...@codeaurora.org wrote:
Describe the HFPLLs present on MSM8960 devices.
Signed-off-by: Stephen Boyd sb...@codeaurora.org
---
drivers/clk/qcom/gcc-msm8960.c | 82
++
1 file changed, 82
On Wed, Jun 25, 2014 at 5:36 AM, Stephen Boyd sb...@codeaurora.org wrote:
The Krait CPU clocks are made up of a primary mux and secondary
mux for each CPU and the L2, controlled via cp15 accessors. For
Kraits within KPSSv1 each secondary mux accepts a different aux
source, but on KPSSv2 each
On Tue, Jun 17, 2014 at 8:02 PM, Stephane Viau sv...@codeaurora.org wrote:
Iommu support is slightly modified in order to make sure
that MDP iommu is properly cleaned up if a probe deferral is
requested. Before this change, IOMMU faults would occur if the
probe failed (-EPROBE_DEFER).
Hi Bjorn,
-Original Message-
From: Bjorn Andersson bjorn.anders...@sonymobile.com
Sent: Tuesday, 17 June, 2014 12:16am
To: Rob Herring robh...@kernel.org, Mark Rutland mark.rutl...@arm.com,
Liam Girdwood lgirdw...@gmail.com, Mark Brown broo...@kernel.org,
Kumar Gala
Hi Bjorn,
On Tue, Jun 17, 2014 at 12:16 AM, Bjorn Andersson
bjorn.anders...@sonymobile.com wrote:
Driver for the Resource Power Manager (RPM) found in Qualcomm 8660, 8960
and 8064 based devices. The driver exposes resources that child drivers
can operate on; to implementing regulator, clock
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