On 2017年02月06日 01:15, Christoph Hellwig wrote:
This lets IRQ layer handle dispatching IRQs to separate handlers for the
case where we don't have per-VQ MSI-X vectors, and allows us to greatly
simplify the code based on the assumption that we always have interrupt
vector 0 (legacy INTx or config
This lets IRQ layer handle dispatching IRQs to separate handlers for the
case where we don't have per-VQ MSI-X vectors, and allows us to greatly
simplify the code based on the assumption that we always have interrupt
vector 0 (legacy INTx or config interrupt for MSI-X) available, and
any other inte
On 2017年02月03日 17:52, Christoph Hellwig wrote:
On Fri, Feb 03, 2017 at 05:47:41PM +0800, Jason Wang wrote:
No, we need to allocate the array larger in that case as want proper
names for the interrupts.
Consider the case of !per_vq_vectors, the size of msix_names is 2, but
snprintf can do out
On Fri, Feb 03, 2017 at 05:47:41PM +0800, Jason Wang wrote:
>> No, we need to allocate the array larger in that case as want proper
>> names for the interrupts.
>
> Consider the case of !per_vq_vectors, the size of msix_names is 2, but
> snprintf can do out of bound accessing here. (We name the ms
On 2017年02月03日 16:26, Christoph Hellwig wrote:
On Fri, Feb 03, 2017 at 03:54:54PM +0800, Jason Wang wrote:
On 2017年01月27日 16:16, Christoph Hellwig wrote:
+ snprintf(vp_dev->msix_names[i + 1],
+sizeof(*vp_dev->msix_names), "%s-%s",
On Fri, Feb 03, 2017 at 03:54:54PM +0800, Jason Wang wrote:
> On 2017年01月27日 16:16, Christoph Hellwig wrote:
>> +snprintf(vp_dev->msix_names[i + 1],
>> + sizeof(*vp_dev->msix_names), "%s-%s",
>> dev_name(&vp_dev->vdev.dev), names[i]);
>>
On 2017年01月27日 16:16, Christoph Hellwig wrote:
+ snprintf(vp_dev->msix_names[i + 1],
+sizeof(*vp_dev->msix_names), "%s-%s",
dev_name(&vp_dev->vdev.dev), names[i]);
err = request_irq(pci_irq_vector(vp_dev->pci_dev, ms
This lets IRQ layer handle dispatching IRQs to separate handlers for the
case where we don't have per-VQ MSI-X vectors, and allows us to greatly
simplify the code based on the assumption that we always have interrupt
vector 0 (legacy INTx or config interrupt for MSI-X) available, and
any other inte
