On Mon, Oct 26, 2015 at 8:33 AM, Linus Walleij wrote:
> This adds the device tree bindings for the ARM Syscon ICST
> oscillators, which is a register-level interface to the
> Integrated Device Technology (IDT) ICS525 and ICS307
> serially programmable oscillators.
>
> Cc: devicet...@vger.kernel.or
Hi Laurent,
CC linux-pm
On Tue, Oct 27, 2015 at 2:34 AM, Laurent Pinchart
wrote:
> On Monday 26 October 2015 20:02:45 Geert Uytterhoeven wrote:
>> On Fri, Oct 23, 2015 at 1:10 PM, Laurent Pinchart wrote:
>> > On Friday 16 October 2015 14:49:16 Geert Uytterhoeven wrote:
>> >> On Renesas ARM SoCs
On Fri, Oct 23, 2015 at 6:24 PM, Stephen Boyd wrote:
> On 10/23, Linus Walleij wrote:
>> On Thu, Oct 15, 2015 at 9:08 PM, Stephen Boyd wrote:
>> > On 10/15, Linus Walleij wrote:
>> >> @@ -151,10 +174,19 @@ struct clk *icst_clk_register(struct device *dev,
>> >> init.flags = CLK_IS_ROOT;
>>
On 10/26, Linus Walleij wrote:
> This adds the device tree bindings for the ARM Syscon ICST
> oscillators, which is a register-level interface to the
> Integrated Device Technology (IDT) ICS525 and ICS307
> serially programmable oscillators.
>
> Cc: devicet...@vger.kernel.org
> Cc: Michael Turquet
On 10/26, Florian Fainelli wrote:
> diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
> index 85260fb96b36..a0c18528b70d 100644
> --- a/drivers/clk/bcm/Kconfig
> +++ b/drivers/clk/bcm/Kconfig
> @@ -1,3 +1,13 @@
> +config CLK_BCM_63XX
> + bool "Broadcom BCM63xx clock support"
> +
On 27/10/15 10:46, Stephen Boyd wrote:
> On 10/26, Florian Fainelli wrote:
>> diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
>> index 85260fb96b36..a0c18528b70d 100644
>> --- a/drivers/clk/bcm/Kconfig
>> +++ b/drivers/clk/bcm/Kconfig
>> @@ -1,3 +1,13 @@
>> +config CLK_BCM_63XX
>> +
On 10/27, Florian Fainelli wrote:
> On 27/10/15 10:46, Stephen Boyd wrote:
> > On 10/26, Florian Fainelli wrote:
> >> diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
> >> index 85260fb96b36..a0c18528b70d 100644
> >> --- a/drivers/clk/bcm/Kconfig
> >> +++ b/drivers/clk/bcm/Kconfig
> >
On 10/26, Florian Fainelli wrote:
> Hi all,
>
> This patch series adds support for the Broadcom BCM63138 DSL SoCs
> clocking framework.
>
> Since the HW is identical to the one found in Broadcom iProc SoCs, but the
> integration is different (obviously), there is still a new compatible string
> i
On 26/10/2015 at 18:21:22 +0530, Alim Akhtar wrote :
> RTC found in s2mps15 is almost same as one found in s2mps14.
> This patch add required changes to enable s2mps15 rtc timer.
>
> Signed-off-by: Alim Akhtar
One really small nitpick below else you can add my
Acked-by: Alexandre Belloni
> ---
On 10/26, Stephen Boyd wrote:
> We want to put the XO board clocks into the dt files. Add an API
> to do this generically. This also makes a place for us to handle
> the case where the RPM driver is enabled or disabled.
>
> Cc: Georgi Djakov
> Signed-off-by: Stephen Boyd
> ---
>
> I'm also thin
We want to put the XO board clocks into the dt files, but we also
need to be backwards compatible with an older dtb. Add an API to
the common code to do this. This also makes a place for us to
handle the case when the RPM clock driver is enabled and we don't
want to register the fixed factor clock.
Put these clocks into the dt files instead of registering them
from C code. This provides a few benefits. It allows us to
specify the frequency of these clocks at the board level instead
of hard-coding them in the driver. It allows us to insert an RPM
clock in between the consumers of the crystals
On 10/20, Georgi Djakov wrote:
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> new file mode 100644
> index ..aa634bdf0aae
> --- /dev/null
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -0,0 +1,260 @@
> +
> +static int clk_smd_rpm_set_rate_active(struct clk
On 10/20, Georgi Djakov wrote:
> diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> index 8748fcca70f4..355a2acea796 100644
> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> @@ -80,6 +80,15 @@
>
On 10/20, Georgi Djakov wrote:
> diff --git a/drivers/clk/qcom/rpmcc.c b/drivers/clk/qcom/rpmcc.c
> new file mode 100644
> index ..88283e2c95f7
> --- /dev/null
> +++ b/drivers/clk/qcom/rpmcc.c
> @@ -0,0 +1,198 @@
> +/*
> + * Copyright (c) 2015, Linaro Limited
> + * Copyright (c) 2014, T
On 27/10/15 14:08, Stephen Boyd wrote:
> On 10/26, Florian Fainelli wrote:
>> Hi all,
>>
>> This patch series adds support for the Broadcom BCM63138 DSL SoCs
>> clocking framework.
>>
>> Since the HW is identical to the one found in Broadcom iProc SoCs, but the
>> integration is different (obviousl
Broadcom BCM63138 DSL SoCs have the same ARMPLL clocking infrastructure
as the Cygnus and iProc chips, add a dedicated compatible string and
document that the ARMPLL node is a valid node for this chip.
Acked-by: Rob Herring
Signed-off-by: Florian Fainelli
---
Changes in v3:
- added Rob's Acked-
Add the ARM PLL controller which comes standard with the Cortex-A9 found
on the BCM63138 SoCs. This is the same controller as the one found in
the Broadcom iProc architecture, however, we have a separate compatible
string to indicate the integration difference.
While at it, properly rename referen
BCM63138 has a simple clocking domain which is primarily the ARMPLL
clocking complex, from which the ARM (CPU), APB and AXI clocks would be
derived from.
Since the ARMPLL controller is entirely compatible with the iProc ARM
PLL, we just initialize it without additional parameters.
Signed-off-by:
Hi all,
This patch series adds support for the Broadcom BCM63138 DSL SoCs
clocking framework.
Since the HW is identical to the one found in Broadcom iProc SoCs, but the
integration is different (obviously), there is still a new compatible string
introduced just in case we happen to find issues in
The thread didn't seem to finish, so here's some review.
On 10/22, Jon Mason wrote:
> diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
> index 46ee475..0352ccf 100644
> --- a/drivers/clk/bcm/Kconfig
> +++ b/drivers/clk/bcm/Kconfig
> @@ -9,8 +9,41 @@ config CLK_BCM_KONA
> in t
On 10/27, Stephen Boyd wrote:
> +
> +int qcom_cc_register_board_clk(struct device *dev, const char *path,
> +const char *name, unsigned long rate)
> +{
> + return _qcom_cc_register_board_clk(dev, path, name, rate,
> +!IS_ENABLE
On 26.10.2015 20:59, Andrzej Hajda wrote:
> DECON-TV(Display and Enhancement Controller for TV) is a variation
> of DECON IP. Its main purpose is to produce video stream for HDMI IP.
>
> Signed-off-by: Andrzej Hajda
> ---
> Hi Krzysztof,
>
> I have decided to skip cleanup part as it would requir
On 26.10.2015 23:34, Lee Jones wrote:
> On Mon, 26 Oct 2015, Alim Akhtar wrote:
>
>> From: Thomas Abraham
>>
>> Add support for S2MPS15 PMIC which is similar to S2MPS11 PMIC. The S2MPS15
>> PMIC supports 27 LDO regulators, 10 buck regulators, RTC, three 32.768KHz
>> clock outputs and battery char
On 26.10.2015 21:51, Alim Akhtar wrote:
> S2MPS15 PMIC has three 32k buffered clocks outputs. This patch
> adds supports for the same to the s2mps11 clock driver.
>
> Signed-off-by: Alim Akhtar
> ---
> drivers/clk/Kconfig |5 +++--
> drivers/clk/clk-s2mps11.c | 24 +++
On 26.10.2015 21:51, Alim Akhtar wrote:
> S2MPS15 PMIC has three 32k buffered clocks outputs. This patch
> adds supports for the same to the s2mps11 clock driver.
>
> Signed-off-by: Alim Akhtar
> ---
> drivers/clk/Kconfig |5 +++--
> drivers/clk/clk-s2mps11.c | 24 +++
On 26.10.2015 21:51, Alim Akhtar wrote:
> From: Thomas Abraham
>
> Add support for S2MPS15 PMIC which is similar to S2MPS11 PMIC. The S2MPS15
> PMIC supports 27 LDO regulators, 10 buck regulators, RTC, three 32.768KHz
> clock outputs and battery charger. This patch adds initial support for
> LDO
On 26.10.2015 21:51, Alim Akhtar wrote:
> RTC found in s2mps15 is almost same as one found in s2mps14.
> This patch add required changes to enable s2mps15 rtc timer.
>
> Signed-off-by: Alim Akhtar
> ---
> drivers/rtc/rtc-s5m.c | 14 +-
> 1 file changed, 13 insertions(+), 1 deletion
On Wed, Oct 28, 2015 at 10:29:56AM +0900, Krzysztof Kozlowski wrote:
> If that's true, then don't add new compatibles, new names etc. Re-use.
> No new code needed, no changes needed. Keep it simple.
Well, it depends - it can be useful to get the information about it
being a different part into DT
On 28.10.2015 10:53, Mark Brown wrote:
> On Wed, Oct 28, 2015 at 10:29:56AM +0900, Krzysztof Kozlowski wrote:
>
>> If that's true, then don't add new compatibles, new names etc. Re-use.
>> No new code needed, no changes needed. Keep it simple.
>
> Well, it depends - it can be useful to get the in
Hello,
On 10/28/2015 07:47 AM, Krzysztof Kozlowski wrote:
On 28.10.2015 10:53, Mark Brown wrote:
On Wed, Oct 28, 2015 at 10:29:56AM +0900, Krzysztof Kozlowski wrote:
If that's true, then don't add new compatibles, new names etc. Re-use.
No new code needed, no changes needed. Keep it simple.
On 28.10.2015 12:14, Alim Akhtar wrote:
> Hello,
>
> On 10/28/2015 07:47 AM, Krzysztof Kozlowski wrote:
>> On 28.10.2015 10:53, Mark Brown wrote:
>>> On Wed, Oct 28, 2015 at 10:29:56AM +0900, Krzysztof Kozlowski wrote:
>>>
If that's true, then don't add new compatibles, new names etc. Re-use.
On 10/28/2015 09:01 AM, Krzysztof Kozlowski wrote:
On 28.10.2015 12:14, Alim Akhtar wrote:
Hello,
On 10/28/2015 07:47 AM, Krzysztof Kozlowski wrote:
On 28.10.2015 10:53, Mark Brown wrote:
On Wed, Oct 28, 2015 at 10:29:56AM +0900, Krzysztof Kozlowski wrote:
If that's true, then don't add n
Hello
On 10/28/2015 06:52 AM, Krzysztof Kozlowski wrote:
On 26.10.2015 21:51, Alim Akhtar wrote:
S2MPS15 PMIC has three 32k buffered clocks outputs. This patch
adds supports for the same to the s2mps11 clock driver.
Signed-off-by: Alim Akhtar
---
drivers/clk/Kconfig |5 +++--
dri
Hi Bhupesh,
On Fri, Oct 16, 2015 at 1:41 AM, Sharma Bhupesh
wrote:
> I think this can be moved to the generic bindings for DWC3 PCIe driver.
> However
> I cannot vouch if the same is true for usage of this IP in other SoCs and it
> will not break existing drivers if this property is not defined
On 28.10.2015 10:26, Krzysztof Kozlowski wrote:
> On 26.10.2015 21:51, Alim Akhtar wrote:
>> S2MPS15 PMIC has three 32k buffered clocks outputs. This patch
>> adds supports for the same to the s2mps11 clock driver.
>>
>> Signed-off-by: Alim Akhtar
>> ---
>> drivers/clk/Kconfig |5 +++--
On 10/28/2015 10:04 AM, Krzysztof Kozlowski wrote:
On 28.10.2015 10:26, Krzysztof Kozlowski wrote:
On 26.10.2015 21:51, Alim Akhtar wrote:
S2MPS15 PMIC has three 32k buffered clocks outputs. This patch
adds supports for the same to the s2mps11 clock driver.
Signed-off-by: Alim Akhtar
---
On 28.10.2015 13:55, Alim Akhtar wrote:
>
>
> On 10/28/2015 10:04 AM, Krzysztof Kozlowski wrote:
>> On 28.10.2015 10:26, Krzysztof Kozlowski wrote:
>>> On 26.10.2015 21:51, Alim Akhtar wrote:
S2MPS15 PMIC has three 32k buffered clocks outputs. This patch
adds supports for the same to th
38 matches
Mail list logo
