Add a node describing the Security ID memory to the
Allwinner H3 .dtsi file.
Signed-off-by: Josef Gajdusek
---
arch/arm/boot/dts/sun8i-h3.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 0faa38a..58de718 10064
This patch adds a driver for the THS clock which is present on the
Allwinner H3.
Signed-off-by: Josef Gajdusek
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/Makefile| 1 +
drivers/clk/sunxi/clk-h3-ths.c| 98 ++
Hello everyone,
this is v2 of my THS patchset
Changelog:
* Some stylistic changes
* devm_reset_control_get_optional -> devm_reset_control_get
* Added the clk-h3-ths clock driver
- Note: A23/A33/A83T do not have a separate clock, H3 seems to be the first
(and only?) SoC with it
This patch adds nodes for the THS driver and the THS clock to the Allwinner
H3 .dtsi file.
Signed-off-by: Josef Gajdusek
---
arch/arm/boot/dts/sun8i-h3.dtsi | 33 +
1 file changed, 33 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/
This patch adds support for the Sunxi thermal sensor on the Allwinner H3.
Should be easily extendable for the A33/A83T/... as they have similar but
not completely identical sensors.
Signed-off-by: Josef Gajdusek
---
drivers/thermal/Kconfig | 7 +
drivers/thermal/Makefile| 1 +
driver
This patch adds the binding documentation for the sun8i_ths driver
Signed-off-by: Josef Gajdusek
---
.../devicetree/bindings/thermal/sun8i-ths.txt | 31 ++
1 file changed, 31 insertions(+)
create mode 100644 Documentation/devicetree/bindings/thermal/sun8i-ths.txt
diff
Hi
>> While working with board with imx6s cpu, with kernel based on linux-imx
>> imx_3.14.28_1.0.0_ga branch, I noticed this message in boot log:
>>
>>> failed to set parent of clk gpu2d_core_sel to pll2_pfd1_594m
>>
>>
>> I looked into it and found that:
>>
>> - CCM_CBCMR register layout is diffe
> +static unsigned long rk3399_dmcclk_recalc_rate(struct clk_hw *hw,
> +unsigned long parent_rate)
> +{
> + struct rk3399_dmcclk *dmc = to_rk3399_dmcclk(&hw);
> + u32 val;
> +
> + /*
> + * Get parent rate since it changed in this clks set
Dear all,
On Mon, 23 Nov 2015 15:21:58 +0800
Jisheng Zhang wrote:
> Dear Sebastian,
>
> On Fri, 20 Nov 2015 22:06:59 +0100
> Sebastian Hesselbarth wrote:
>
> > On 20.11.2015 09:42, Jisheng Zhang wrote:
> > > Add syspll, mempll, cpupll, gateclk and berlin-clk nodes.
> > >
> > > Signed-off-by:
On 23.11.2015 08:21, Jisheng Zhang wrote:
On Fri, 20 Nov 2015 22:06:59 +0100
Sebastian Hesselbarth wrote:
On 20.11.2015 09:42, Jisheng Zhang wrote:
Add syspll, mempll, cpupll, gateclk and berlin-clk nodes.
Signed-off-by: Jisheng Zhang
---
[...]
+ syspll: syspll {
+
On Mon, 23 Nov 2015 09:30:42 +0100
Sebastian Hesselbarth wrote:
> On 23.11.2015 08:21, Jisheng Zhang wrote:
> > On Fri, 20 Nov 2015 22:06:59 +0100
> > Sebastian Hesselbarth wrote:
> >> On 20.11.2015 09:42, Jisheng Zhang wrote:
> >>> Add syspll, mempll, cpupll, gateclk and berlin-clk nodes.
> >
Hi Heiko,
On 22/11/15 02:30, Heiko Stuebner wrote:
Hi Lin,
Am Freitag, 20. November 2015, 09:37:15 schrieb hl:
On 20/11/15 05:47, Heiko Stuebner wrote:
Hi Lin,
Am Donnerstag, 19. November 2015, 18:21:10 schrieb Lin Huang:
support rk3399 dmc clock driver. Note, ddr set rate function will
use
Hi MyungJoo,
On 23/11/15 16:09, MyungJoo Ham wrote:
+static unsigned long rk3399_dmcclk_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ struct rk3399_dmcclk *dmc = to_rk3399_dmcclk(&hw);
+ u32 val;
+
+ /*
+*
On Mon, Nov 23, 2015 at 4:02 PM, Josef Gajdusek wrote:
> This patch adds the binding documentation for the sun8i_ths driver
>
> Signed-off-by: Josef Gajdusek
> ---
> .../devicetree/bindings/thermal/sun8i-ths.txt | 31
> ++
> 1 file changed, 31 insertions(+)
> create mo
If get_pll_div() fails we exited by returning NULL but we missed
releasing hwc.
Signed-off-by: Sudip Mukherjee
---
drivers/clk/clk-qoriq.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 1ab0fb8..7bc1c45 100644
--- a/
On Mon, 2015-11-23 at 09:02 +0100, Josef Gajdusek wrote:
> This patch adds a driver for the THS clock which is present on the
> Allwinner H3.
>
> Signed-off-by: Josef Gajdusek
> ---
> Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
> drivers/clk/sunxi/Makefile|
On 20/11/15 17:15, Stephen Boyd wrote:
> On 11/20, Jon Hunter wrote:
>> The _clk_disable_pll() function will attempt to place a PLL into bypass
>> if the TEGRA_PLL_BYPASS is specified for the PLL and then disable the PLL
>> by clearing the enable bit. To place the PLL into bypass, the bypass bit
>
Hi,
On Mon, Nov 23, 2015 at 09:02:51AM +0100, Josef Gajdusek wrote:
> This patch adds the binding documentation for the sun8i_ths driver
>
> Signed-off-by: Josef Gajdusek
> ---
> .../devicetree/bindings/thermal/sun8i-ths.txt | 31
> ++
> 1 file changed, 31 insertions(+
Hi,
On Mon, Nov 23, 2015 at 09:02:48AM +0100, Josef Gajdusek wrote:
> Add a node describing the Security ID memory to the
> Allwinner H3 .dtsi file.
>
> Signed-off-by: Josef Gajdusek
> ---
> arch/arm/boot/dts/sun8i-h3.dtsi | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/ar
This patch series adds support for the Cygnus audio clock based on existing
iProc clock support
This patch series is developed based on v4.4-rc1 with full tree available
on GITHUB:
repo: https://github.com/Broadcom/cygnus-linux.git
branch: cygnus-audio-clk-v2
Changes from v1:
- Remove function p
From: Simran Rai
Add audio clock to the existing Broadcom Cygnus clock DT
Signed-off-by: Simran Rai
Reviewed-by: Ray Jui
Reviewed-by: Scott Branden
---
arch/arm/boot/dts/bcm-cygnus-clock.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/bcm-cygnus-clock.dtsi
Remove __init macro from all function prototypes in clk-iproc.h
Signed-off-by: Ray Jui
---
drivers/clk/bcm/clk-iproc.h | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/clk/bcm/clk-iproc.h b/drivers/clk/bcm/clk-iproc.h
index febae11..2148b4e 100
From: Simran Rai
This patch adds support for Broadcom Cygnus audio PLL and leaf
clocks
Signed-off-by: Simran Rai
Reviewed-by: Scott Branden
Signed-off-by: Ray Jui
---
drivers/clk/bcm/clk-cygnus.c | 59 ++
drivers/clk/bcm/clk-iproc-pll.c| 41 +
From: Simran Rai
This patch adds audio clock device tree binding documentation to an
existing Cygnus clock DT bindings document.
Signed-off-by: Simran Rai
Reviewed-by: Ray Jui
Reviewed-by: Lori Hikichi
Reviewed-by: Scott Branden
---
Documentation/devicetree/bindings/clock/brcm,iproc-clocks.
On 29/10/15 18:23, Florian Fainelli wrote:
> Add the ARM PLL controller which comes standard with the Cortex-A9 found
> on the BCM63138 SoCs. This is the same controller as the one found in
> the Broadcom iProc architecture, however, we have a separate compatible
> string to indicate the integratio
On Mon, Nov 23, 2015 at 09:02:49AM +0100, Josef Gajdusek wrote:
> This patch adds a driver for the THS clock which is present on the
> Allwinner H3.
>
> Signed-off-by: Josef Gajdusek
Acked-by: Rob Herring
> ---
> Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
> drivers/clk/sunxi/Ma
Hi Jon,
On 20 November 2015 at 07:11, Jon Hunter wrote:
> The _clk_disable_pll() function will attempt to place a PLL into bypass
> if the TEGRA_PLL_BYPASS is specified for the PLL and then disable the PLL
> by clearing the enable bit. To place the PLL into bypass, the bypass bit
> needs to be se
Hi Xing Zheng,
Am Donnerstag, 5. November 2015, 15:33:54 schrieb Xing Zheng:
> Hi,
> We need to support rk3036 soc platform via upstream, there are
> some primary parts for the initial release of minimum system: dts,
> clk-pll, smp, and clock tree for rk3036, and additional, we can use
> these s
On 11/22, Masahiro Yamada wrote:
> 2015-11-21 2:45 GMT+09:00 Stephen Boyd :
> >
> > What is np pointing at? Something like:
> >
> > consumer {
> > clocks = <&oscillator 0>;
> > };
> >
> > Which would be invalid DT because oscillator doesn't have an
> > output for ind
On 11/21, Bjorn Andersson wrote:
> On Fri 20 Nov 16:39 PST 2015, Stephen Boyd wrote:
>
> > On 11/19, Georgi Djakov wrote:
> > > diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
> > > b/Documentation/devicetree/bindings/clock/qcom,rpmcc.txt
> > > new file mode 100644
> > > index
Dear Sebastian,
On Mon, 23 Nov 2015 16:54:44 +0800
Jisheng Zhang wrote:
> On Mon, 23 Nov 2015 09:30:42 +0100
> Sebastian Hesselbarth wrote:
>
> > On 23.11.2015 08:21, Jisheng Zhang wrote:
> > > On Fri, 20 Nov 2015 22:06:59 +0100
> > > Sebastian Hesselbarth wrote:
> > >> On 20.11.2015 09:42
On Thu, Nov 19, 2015 at 07:32:05PM +0100, Geert Uytterhoeven wrote:
> Hi Simon, Magnus,
>
> This patch series cleans up the clock API on legacy SH, to make it more
> similar with the Common Clock Framework. This will avoid different
> behavior in drivers shared between legacy and CCF-based
Hi,
On Mon, Nov 23, 2015 at 8:43 PM, Maxime Ripard
wrote:
> Hi,
>
> On Mon, Nov 23, 2015 at 09:02:48AM +0100, Josef Gajdusek wrote:
>> Add a node describing the Security ID memory to the
>> Allwinner H3 .dtsi file.
>>
>> Signed-off-by: Josef Gajdusek
>> ---
>> arch/arm/boot/dts/sun8i-h3.dtsi |
Hi Stephen,
2015-11-22 14:44 GMT+09:00 Masahiro Yamada :
> Hi Stephen,
>
>
> 2015-11-21 9:37 GMT+09:00 Stephen Boyd :
>> On 11/20, Masahiro Yamada wrote:
>>> Currently, there is no function to get the clock name of the given
>>> node. Create a new helper function, of_clk_get_name(). This is
>>>
On Tue, Nov 24, 2015 at 11:13:13AM +0800, Chen-Yu Tsai wrote:
> Hi,
>
> On Mon, Nov 23, 2015 at 8:43 PM, Maxime Ripard
> wrote:
> > Hi,
> >
> > On Mon, Nov 23, 2015 at 09:02:48AM +0100, Josef Gajdusek wrote:
> >> Add a node describing the Security ID memory to the
> >> Allwinner H3 .dtsi file.
>
On Mon, Nov 23, 2015 at 07:24:40PM -0800, Sugar Wu wrote:
> I will give you the right widths as soon.
Great, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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On Tue, Nov 24, 2015 at 2:38 PM, Maxime Ripard
wrote:
> On Tue, Nov 24, 2015 at 11:13:13AM +0800, Chen-Yu Tsai wrote:
>> Hi,
>>
>> On Mon, Nov 23, 2015 at 8:43 PM, Maxime Ripard
>> wrote:
>> > Hi,
>> >
>> > On Mon, Nov 23, 2015 at 09:02:48AM +0100, Josef Gajdusek wrote:
>> >> Add a node describin
OK, Thanks Heiko. :-)
On 2015年11月24日 08:03, Heiko Stübner wrote:
Hi Xing Zheng,
Am Donnerstag, 5. November 2015, 15:33:54 schrieb Xing Zheng:
Hi,
We need to support rk3036 soc platform via upstream, there are
some primary parts for the initial release of minimum system: dts,
clk-pll, smp, a
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