On Mon, 16 Mar 2015 12:02:51 +0200
Horia Geantă horia.gea...@freescale.com wrote:
On 3/4/2015 2:23 AM, Kim Phillips wrote:
Only potential problem is getting the crypto API to set the GFP_DMA
flag in the allocation request, but presumably a
CRYPTO_TFM_REQ_DMA crt_flag can be made to handle
On Thu, Mar 12, 2015 at 11:17:25PM +, James Hartley wrote:
This adds support for the Imagination Technologies hash accelerator which
provides hardware acceleration for SHA1 SHA244 SHA256 and MD5 hashes.
Tested on silicon, using testmgr.
All applied. Thanks!
--
Email: Herbert Xu
On 3/4/2015 2:23 AM, Kim Phillips wrote:
Only potential problem is getting the crypto API to set the GFP_DMA
flag in the allocation request, but presumably a
CRYPTO_TFM_REQ_DMA crt_flag can be made to handle that.
Seems there are quite a few places that do not use the
On Thu, Mar 12, 2015 at 02:00:01PM -0700, Dmitry Torokhov wrote:
A few drivers can benefit from devm-style interface for hwrng since it
is quite often the last thing that isn't automatically managed. Using
devm_hwrng_register() in such drivers allows get rid of manual error
unwinding and
On Mon, 2015-03-16 at 21:50 +1100, Herbert Xu wrote:
On Fri, Mar 13, 2015 at 11:38:21PM +0200, Ameen Ali wrote:
fixing a syntax-error .
Signed-off-by : Ameen Ali ameenali...@gmail.com
Applied.
The commit summary and the commit explanation are a bit misleading. This
is not a syntax
On Sat, Mar 14, 2015 at 1:16 PM, Horia Geantă
horia.gea...@freescale.com wrote:
On 3/13/2015 8:37 PM, Tom Lendacky wrote:
+
+/* Try to backlog request (if allowed) */
+return crypto_enqueue_request(priv-chan[ch].queue, areq);
I'd remembered something about how
Add Andy Polyakov's NEON optimized SHA-256 implementation.
On Nexus 6, this implementation is ~2x faster than sha256-generic.
Signed-off-by: Sami Tolvanen samitolva...@google.com
---
arch/arm/crypto/Makefile|2
arch/arm/crypto/sha256-armv7-neon.S | 819
After the iocb parameter has been removed from sendmsg() and recvmsg() ops
the socket layer, and the network stack no longer support async operations.
This patch set adds support for asynchronous operations on sockets back.
--
Tadeusz Struk (4):
net: socket: add support for async operations
Add support for async operations.
Signed-off-by: Tadeusz Struk tadeusz.st...@intel.com
---
include/linux/net.h |5
net/socket.c| 63 +++
2 files changed, 68 insertions(+)
diff --git a/include/linux/net.h b/include/linux/net.h
AIO interface should prefer AIO operations over iter_op
Signed-off-by: Tadeusz Struk tadeusz.st...@intel.com
---
fs/aio.c |8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/fs/aio.c b/fs/aio.c
index f8e52a1..389f4dd 100644
--- a/fs/aio.c
+++ b/fs/aio.c
@@ -1449,11
From: Tadeusz Struk tadeusz.st...@intel.com
Allow to link af_alg sgls.
Signed-off-by: Tadeusz Struk tadeusz.st...@intel.com
---
crypto/af_alg.c | 18 +-
include/crypto/if_alg.h |4 +++-
2 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/crypto/af_alg.c
Hello Sami,
On 16 March 2015 at 16:48, Sami Tolvanen samitolva...@google.com wrote:
Add Andy Polyakov's NEON optimized SHA-256 implementation.
On Nexus 6, this implementation is ~2x faster than sha256-generic.
Signed-off-by: Sami Tolvanen samitolva...@google.com
Have you tested this code
On Mon, Mar 16, 2015 at 05:08:03PM +0100, Ard Biesheuvel wrote:
Have you tested this code with the tcrypt.ko module?
I have not, but I can look into it.
Did you talk to Andy about the license? I don't think this is
permissible for the kernel as-is.
Unless I have misunderstood something, the
* Pavel Machek pa...@ucw.cz [150228 08:49]:
On Thu 2015-02-26 14:49:56, Pali Rohár wrote:
This patch adds missing dma DTS definitions for omap aes and sham drivers.
Without it kernel drivers do not work.
Signed-off-by: Pali Rohár pali.ro...@gmail.com
Acked-by: PavelMachek
Signed-off-by: LABBE Corentin clabbe.montj...@gmail.com
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 0e1abe8..ebca296 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10923,6 +10923,12 @@ L: linux...@kvack.org
S: Maintained
F:
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG algorithms.
It could be found on many Allwinner SoC.
This patch enable the Security System on the Allwinner A20 SoC Device-tree.
Signed-off-by: LABBE Corentin clabbe.montj...@gmail.com
---
Add support for the Security System included in Allwinner SoC A20.
The Security System is a hardware cryptographic accelerator that support:
- MD5 and SHA1 hash algorithms
- AES block cipher in CBC mode with 128/196/256bits keys.
- DES and 3DES block cipher in CBC mode
Signed-off-by: LABBE
Hello
This is the driver for the Security System included in Allwinner SoC A20.
The Security System (SS for short) is a hardware cryptographic accelerator that
support AES/MD5/SHA1/DES/3DES/PRNG algorithms.
It could be found on others Allwinner SoC:
- A10s, A33 and A31 diagram speak about it
On 3/13/2015 4:08 PM, Martin Hicks wrote:
Hi Horia,
On Wed, Mar 11, 2015 at 11:48 AM, Horia Geantă
horia.gea...@freescale.com wrote:
While here: note that xts-talitos supports only two key lengths - 256
and 512 bits. There are tcrypt speed tests that check also for 384-bit
keys (which is
On Mon, 2015-03-16 at 20:01 +0100, LABBE Corentin wrote:
[]
diff --git a/MAINTAINERS b/MAINTAINERS
[]
@@ -10923,6 +10923,12 @@ L: linux...@kvack.org
S: Maintained
F: mm/zswap.c
+ALLWINNER SECURITY SYSTEM
+M: Corentin Labbe clabbe.montj...@gmail.com
+L:
On Fri, Mar 13, 2015 at 11:38:21PM +0200, Ameen Ali wrote:
fixing a syntax-error .
Signed-off-by : Ameen Ali ameenali...@gmail.com
Applied.
--
Email: Herbert Xu herb...@gondor.apana.org.au
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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