Re: [PATCH] crypto: caam - fix rfc4106 encap shared descriptor

On 7/30/2015 4:46 PM, Herbert Xu wrote: On Thu, Jul 30, 2015 at 04:39:26PM +0300, Horia Geantă wrote: The encap shared descriptor was changed to use the new IV convention. In the process some commands were shifted, making the output length zero, caam effectively writing garbage in dst.

[PATCH v1 3/4] Crypto: Add support for APM X-Gene SoC CRC32C h/w accelerator driver

This patch implements support for APM X-Gene SoC CRC32C h/w accelerator. DMA engine in APM X-Gene SoC is capable of doing CRC32C calculations. Signed-off-by: Rameshwar Prasad Sahu rs...@apm.com --- drivers/crypto/Kconfig| 8 ++ drivers/crypto/Makefile | 1 +

Re: [PATCH v1 0/4] Crypto: tcrypt: Add test case for APM X-Gene SoC CRC32C algo

Hi All, On Thu, Jul 30, 2015 at 5:41 PM, Rameshwar Prasad Sahu rs...@apm.com wrote: This patch adds test case for APM X-Gene SoC CRC32C algorithm. Please discard this patch description and subject line in this cover letter, I have resent it again. Thanks, Ram Signed-off-by: Rameshwar Prasad

[PATCH] crypto: caam - fix rfc4106 encap shared descriptor

The encap shared descriptor was changed to use the new IV convention. In the process some commands were shifted, making the output length zero, caam effectively writing garbage in dst. While here, update the decap descriptor to execute the write commands before the reads (as it previously was).

[PATCH v1 0/4] dmaengine: Add supports for APM X-Gene SoC CRC32C accerlerator driver

This patch implements support for APM X-Gene SoC CRC32C h/w accelerator driver and adds CRC32C support in dmaengine framework. APM X-Gene SoC has DMA engine capable of performing CRC32C. Signed-off-by: Rameshwar Prasad Sahu rs...@apm.com --- Rameshwar Prasad Sahu (4): dmaengine: Add support

[PATCH v1 0/4] Crypto: tcrypt: Add test case for APM X-Gene SoC CRC32C algo

This patch adds test case for APM X-Gene SoC CRC32C algorithm. Signed-off-by: Rameshwar Prasad Sahu rs...@apm.com --- Rameshwar Prasad Sahu (4): dmaengine: Add support for new feature CRC32C dmaengine: xgene-dma: Add support for CRC32C calculation via DMA engine Crypto: Add support for

[PATCH v1 2/4] dmaengine: xgene-dma: Add support for CRC32C calculation via DMA engine

This patch implements CRC32C support to APM X-Gene SoC DMA engine driver. Basically we have DMA engine in SoC capable of doing CRC32C calculations. Signed-off-by: Rameshwar Prasad Sahu rs...@apm.com --- drivers/dma/xgene-dma.c | 317 +--- 1 file

[PATCH v1 4/4] Crypto: tcrypt: Add test case for APM X-Gene SoC CRC32C algo

This patch adds test case for APM X-Gene SoC CRC32C algorithm. Signed-off-by: Rameshwar Prasad Sahu rs...@apm.com --- crypto/tcrypt.c | 4 crypto/testmgr.c | 9 + 2 files changed, 13 insertions(+) diff --git a/crypto/tcrypt.c b/crypto/tcrypt.c index 9f6f10b..0bbb1e2 100644 ---

[PATCH v1 1/4] dmaengine: Add support for new feature CRC32C

This patch adds support for new feature CRC32C calculation in dmaengine framework. Signed-of-by: Rameshwar Prasad Sahurs...@apm.com --- drivers/dma/dmaengine.c | 2 ++ include/linux/dmaengine.h | 5 + 2 files changed, 7 insertions(+) diff --git a/drivers/dma/dmaengine.c

Re: [PATCH] crypto: caam - fix rfc4106 encap shared descriptor

On Thu, Jul 30, 2015 at 04:59:01PM +0300, Horia Geantă wrote: Indeed, there is: A-005473 - Using SEQ FIFO LOAD SKIP and SEQ FIFO STORE SKIP simultaneously will cause the DECO to hang. However, the skip commands are not consecutive, there's a math command between them (both for encap and

Re: [PATCH] MAINTAINERS: change 842 NX owner email address

On Wed, Jul 29, 2015 at 07:50:46PM -0400, Dan Streetman wrote: Change my IBM email to my personal IEEE email. I'm leaving IBM, so my email there won't work anymore. This changes the owner to my personal email, so I can still get cc'ed on patches, until someone at IBM sends a patch to take

Re: [PATCH] crypto: nx - use be32_to_cpu for __be32 field in debug msg

On Wed, Jul 29, 2015 at 07:43:29PM -0400, Dan Streetman wrote: One of the debug messages in the NX 842 PowerNV driver is missing the required be32_to_cpu() wrapper when accessing the __be32 field csb-count. Add the wrapper so the message will show the correct count. Signed-off-by: Dan

Re: [PATCH] crypto: nx - don't err if compressed output input

On Wed, Jul 29, 2015 at 07:42:09PM -0400, Dan Streetman wrote: Return success instead of error if compression succeeds but the output is larger than the input. It's unlikely that the caller will use the compressed data since it's larger than the original uncompressed data, but there was no

Re: [PATCH] crypto: caam - fix rfc4106 encap shared descriptor

On 7/30/2015 5:03 PM, Herbert Xu wrote: On Thu, Jul 30, 2015 at 04:59:01PM +0300, Horia Geantă wrote: Indeed, there is: A-005473 - Using SEQ FIFO LOAD SKIP and SEQ FIFO STORE SKIP simultaneously will cause the DECO to hang. However, the skip commands are not consecutive, there's a math

[PATCH v2] crypto: caam - fix rfc4106 encap shared descriptor

The encap shared descriptor was changed to use the new IV convention. In the process some commands were shifted, making the output length zero, caam effectively writing garbage in dst. While here, update the decap descriptor to execute the write commands before the reads (as it previously was).

Re: [PATCH 08/12] ARM: clk-imx6q: Add CAAM clock support

On Wed, Jul 29, 2015 at 08:58:25PM -0700, Victoria Milhoan wrote: Add CAAM clock support to the i.MX6 clocking infrastructure. Signed-off-by: Victoria Milhoan vicki.milh...@freescale.com --- drivers/clk/imx/clk-imx6q.c | 3 +++ include/dt-bindings/clock/imx6qdl-clock.h | 5

Re: [PATCH 09/12] ARM: dts: mx6qdl: Add CAAM device node

On Wed, Jul 29, 2015 at 08:58:26PM -0700, Victoria Milhoan wrote: Add CAAM device node to the i.MX6 device tree. Signed-off-by: Victoria Milhoan vicki.milh...@freescale.com --- arch/arm/boot/dts/imx6qdl.dtsi | 30 ++ 1 file changed, 26 insertions(+), 4

Re: [PATCH 03/12] crypto: caam - Enable and disable clocks on Freescale i.MX platforms

Hi Victoria, comments inline. On Wed, Jul 29, 2015 at 08:58:20PM -0700, Victoria Milhoan wrote: ARM-based systems may disable clocking to the CAAM device on the Freescale i.MX platform for power management purposes. This patch enables the required clocks when the CAAM module is initialized

Re: [PATCH 00/12] crypto: caam - Add i.MX6 support to the Freescale CAAM driver

On 7/30/2015 6:58 AM, Victoria Milhoan wrote: This patch series adds i.MX6 support to the Freescale CAAM driver. Modifications include: - explicit cache coherency support in the driver 1. Please check the aead failures when enabling self-tests (CONFIG_CRYPTO_MANAGER_DISABLE_TESTS not set).

[PATCH 4/8] crypto: ixp4xx - Convert to new AEAD interface

This patch converts ixp4xx to the new AEAD interface. IV generation has been removed since it's a purely software implementation. Signed-off-by: Herbert Xu herb...@gondor.apana.org.au --- drivers/crypto/ixp4xx_crypto.c | 313 - 1 file changed, 158

[PATCH 6/8] crypto: qat - Convert to new AEAD interface

This patch converts qat to the new AEAD interface. IV generation has been removed since it's equivalent to a software implementation. Signed-off-by: Herbert Xu herb...@gondor.apana.org.au --- drivers/crypto/qat/qat_common/qat_algs.c | 319 +++ 1 file changed, 116

[PATCH 8/8] crypto: testmgr - Reenable authenc tests

Now that all implementations of authenc have been converted we can reenable the tests. Signed-off-by: Herbert Xu herb...@gondor.apana.org.au --- crypto/testmgr.c | 26 +- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/crypto/testmgr.c

[PATCH 5/8] crypto: picoxcell - Convert to new AEAD interface

This patch converts picoxcell to the new AEAD interface. IV generation has been removed since it's equivalent to a software implementation. As picoxcell cannot handle SG lists longer than 16 elements, this patch has made the software fallback mandatory. If an SG list comes in that exceeds the

[PATCH 3/8] crypto: caam - Convert authenc to new AEAD interface

This patch converts the authenc implementations in caam to the new AEAD interface. The biggest change is that seqiv no longer generates a random IV. Instead the IPsec sequence number is used as the IV. Signed-off-by: Herbert Xu herb...@gondor.apana.org.au --- drivers/crypto/caam/caamalg.c |

[PATCH 1/8] crypto: testmgr - Disable authenc test and convert test vectors

This patch disables the authenc tests while the conversion to the new IV calling convention takes place. It also replaces the authenc test vectors with ones that will work with the new IV convention. Signed-off-by: Herbert Xu herb...@gondor.apana.org.au --- crypto/testmgr.c | 26 +--

[PATCH 2/8] crypto: authenc - Convert to new AEAD interface

This patch converts authenc to the new AEAD interface. Signed-off-by: Herbert Xu herb...@gondor.apana.org.au --- crypto/authenc.c | 584 +-- 1 file changed, 183 insertions(+), 401 deletions(-) diff --git a/crypto/authenc.c b/crypto/authenc.c

[PATCH 7/8] crypto: talitos - Convert to new AEAD interface

This patch converts talitos to the new AEAD interface. IV generation has been removed since it's equivalent to a software implementation. Signed-off-by: Herbert Xu herb...@gondor.apana.org.au --- drivers/crypto/talitos.c | 606 +-- 1 file changed,

[PATCH 0/8] crypto: aed - Convert authenc to new interface

Hi: This series converts all implementations of authenc to the new AEAD interface. Note that all drivers are compile-tested only. So please test them if you have the right hardware. Oh and you'll need to pull the crypto tree into cryptodev before you apply these patches. Thanks, -- Email: