Hi Linus:
This push fixes the following issues:
* The selftest overreads the IV test vector.
* Fix potential infinite loop in sunxi-ss driver.
* Fix powerpc build failure when VMX is set without VSX.
Please pull from
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6.git
On Tue, Sep 15, 2015 at 10:59:43AM +0100, David Howells wrote:
> Andy Whitcroft wrote:
>
> > This leads us to truncate the id for kernel module signing keys and to
> > fail to recognise our own modules:
> >
> > [1.572423] Loaded X.509 cert 'Build time autogenerated
Load balancing of crypto instances only used a single device.
There was no problem with that on PF, but since there is only
one or two instance per VF we need to loadbalance across devices.
Signed-off-by: Tadeusz Struk
---
drivers/crypto/qat/qat_common/qat_crypto.c |
On 9/9/2015 9:57 AM, Alex Porosanu wrote:
> caam_jr_enqueue() function returns -EBUSY once there are no
> more slots available in the JR, but it doesn't actually save
> the current request. This breaks the functionality of users
> that expect that even if there is no more space for the request,
>
Hello Horia,
-Original Message-
From: Horia Geantă [mailto:horia.gea...@freescale.com]
Sent: Wednesday, September 16, 2015 5:17 PM
To: Porosanu Alexandru-B06830 ;
linux-crypto@vger.kernel.org
Cc: herb...@gondor.apana.org.au; Pop Mircea-R19439
caam_jr_enqueue() function returns -EBUSY once there are no
more slots available in the JR, but it doesn't actually save
the current request. This breaks the functionality of users
that expect that even if there is no more space for the request,
it is at least queued for later execution. In other
Hi Andy,
Okay, it seems that the 00-stripping you pointed out is the problem. Does
this patch fix it? Note that patch won't necessarily apply post-4.2.
David
---
commit fefc5570aa2c88985f62f0f3335428c867103763
Author: David Howells
Date: Wed Sep 16 23:10:24 2015 +0100
Restructure the x86 sha512 glue code so we will expose sha512 transforms
based on SSSE3, AVX or AVX2 as separate individual drivers when cpu
provides support. This will make it easy for alternative algorithms to
be used if desired and makes the code cleaner and easier to maintain.
Signed-off-by:
Restructure the x86 sha1 glue code so we will expose sha1 transforms based
on SSSE3, AVX, AVX2 or SHA-NI extension as separate individual drivers
when cpu provides such support. This will make it easy for alternative
algorithms to be used if desired and makes the code cleaner and easier
to
Restructure the x86 sha256 glue code so we will expose sha256 transforms
based on SSSE3, AVX, AVX2 or SHA-NI extension as separate individual
drivers when cpu provides such support. This will make it easy for
alternative algorithms to be used if desired and makes the code cleaner
and easier to
During the posting of patches of new x86 sha1 and sha256 algorithms based
on new x86 SHA extensions, I got requests to expose all the available
sha transform implementations that are based on SSSE3, AVX and AVX2 as
separate individual crypto driver. The result is this series of patches.
I've
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