On Fri, Dec 11, 2015 at 08:54:40AM -0800, Tim Chen wrote:
> Direct call I assume have less overhead. Let me think about
static inline int crypto_ablkcipher_encrypt(struct ablkcipher_request *req)
{
struct ablkcipher_tfm *crt =
crypto_ablkcipher_crt(crypto_ablkcipher_reqtfm
On Fri, Dec 11, 2015 at 07:22:12AM -0800, Tadeusz Struk wrote:
> On 12/10/2015 09:42 PM, Yang Pingchao wrote:
> > AE CTX bits should be 8-15 in CTX_ENABLES, so the mask value 0xff should be
> > left shifted 0x8
> >
> > Reported-by: Dan Carpenter
> > Signed-off-by: Yang Pingchao
> > ---
> > dr
On Wed, Dec 09, 2015 at 03:05:28PM -0500, Paul Gortmaker wrote:
> This file does not contain any modular related function calls. So get
> rid of module.h since it drags in a lot of other headers and adds to
> the preprocessing load. It does export some symbols though, so we'll
> need to ensure it
On Wed, Dec 09, 2015 at 11:59:45AM -0800, Tadeusz Struk wrote:
> From: Harvijay Saini
>
> When many threads submit multiple requests they get blocked until all
> responses are processed, which prevents them from submitting more requests
> even though there is space on the rings.
> To fix this we
On Wed, Dec 09, 2015 at 11:59:47AM -0800, Tadeusz Struk wrote:
> Fix i386-randconfig-x004-12092241.
> PCI_IOV needs to be selected when VFs are enabled
>
> Reported-by:
> Signed-off-by: Tadeusz Struk
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
On Tue, Dec 08, 2015 at 09:00:23AM +0100, LABBE Corentin wrote:
> Fix numerous spelling error in include/crypto/akcipher.h
>
> Signed-off-by: LABBE Corentin
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert
On Tue, Dec 08, 2015 at 09:10:49AM +0100, LABBE Corentin wrote:
> Hello
>
> Some crypto drivers cannot process empty data message and so rely on
> precalculated hash.
> This patch series add precalculated hash in headers and
> make the drivers use them.
>
> Using those precalculated hash make som
Avoid the s390 compile "warning: 'pkcs1pad_encrypt_sign_complete'
uses dynamic stack allocation" reported by kbuild test robot. Don't
use a flat zero-filled buffer, instead zero the contents of the SGL.
Signed-off-by: Andrew Zaborowski
---
crypto/rsa-pkcs1pad.c | 27 +++
NX842 coprocessor sets 3rd bit in CR register with XER[S0] which is
nothing to do with NX request. On powerpc, XER[S0] will be set if
overflow in FPU and stays until another floating point operation is
executed. Since this bit can be set with other valuable return status,
ignore this XER[S0] value
On 12/07/2015 11:34 AM, Dan Streetman wrote:
> On Sun, Dec 6, 2015 at 2:46 AM, Haren Myneni wrote:
>>
>> NX842 coprocessor sets bit 3 if queue is overflow. It is just for
>> information to the user. So the driver prints this informative message
>> and ignores it.
>>
>> Signed-off-by: Haren Myneni
On Fri, 2015-12-11 at 11:23 +0800, Herbert Xu wrote:
> On Thu, Dec 10, 2015 at 08:39:45AM -0800, Tim Chen wrote:
> >
> > The inner cipher is called synchronously from the outer layer
> > async cipher algorithm in cbc_mb_async_ablk_decrypt via
> >
> > err = crypto_blkcipher_crt(child_tfm)-
On 12/10/2015 09:42 PM, Yang Pingchao wrote:
> AE CTX bits should be 8-15 in CTX_ENABLES, so the mask value 0xff should be
> left shifted 0x8
>
> Reported-by: Dan Carpenter
> Signed-off-by: Yang Pingchao
> ---
> drivers/crypto/qat/qat_common/qat_hal.c |2 +-
> 1 files changed, 1 insertion
Hello
I have some minor comments below.
On Fri, Dec 11, 2015 at 09:58:23AM +0800, Zain Wang wrote:
> Add md5 sha1 sha256 support for crypto engine in rk3288.
> This patch can't support multiple updatings because of limited of IC,
> as result, it can't support import and export too.
>
> Signed-of
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