Re: [RFC PATCH v1 18/28] crypto: add AMD Platform Security Processor driver

2016-08-23 Thread Herbert Xu
On Mon, Aug 22, 2016 at 07:27:22PM -0400, Brijesh Singh wrote: > The driver to communicate with Secure Encrypted Virtualization (SEV) > firmware running within the AMD secure processor providing a secure key > management interface for SEV guests. > > Signed-off-by: Tom Lendacky > Signed-off-by: B

[PATCH] crypto: FIPS - allow RSA keys >= 2048 bits

2016-08-23 Thread Stephan Mueller
With a public notification, NIST now allows the use of RSA keys with a modulus >= 2048 bits. The new rule allows any modulus size >= 2048 bits provided that either 2048 or 3072 bits are supported at least so that the entire RSA implementation can be CAVS tested. This patch fixes the inability to b

Re: [PATCH v2] crypto: XTS - remove test that will fail in FIPS mode

2016-08-23 Thread Herbert Xu
On Tue, Aug 16, 2016 at 11:38:00AM +0200, Stephan Mueller wrote: > Hi Tapas, > > I was able to reproduce the issue now. > > I tested the patch below and it works for me now. Yet, I see that dracut-fips > seems to need some fixes too as it cannot find cmac when compiled as module > and has some

Crypto Fixes for 4.8

2016-08-23 Thread Herbert Xu
Hi Linus: This push fixes a number of memory corruption bugs in the newly added sha256-mb/sha256-mb code. Please pull from git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6.git linus Xiaodong Liu (2): crypto: sha256-mb - fix ctx pointer and digest copy crypto: sha512

Re: [PATCH V2 linux-next] hwrng: update Freescale i.MX RNGA Random Number Generator

2016-08-23 Thread Arnd Bergmann
On Tuesday, August 16, 2016 9:49:45 PM CEST Fabian Frederick wrote: > We can directly depend on SOC_IMX31 since commit c9ee94965dce > ("ARM: imx: deconstruct mxc_rnga initialization") > > Since that commit, CONFIG_HW_RANDOM_MXC_RNGA could not be switched on > with unknown symbol ARCH_HAS_RNGA and

Re: [PATCH -next v2] crypto: sun4i-ss - fix missing unlock on error in sun4i_hash()

2016-08-23 Thread Corentin LABBE
On 20/08/2016 12:48, Wei Yongjun wrote: > Add the missing unlock before return from function sun4i_hash() > in the error handling case. > > Fixes: 477d9b2e591b ("crypto: sun4i-ss - unify update/final function") > Signed-off-by: Wei Yongjun > --- > v1 -> v2: goto release_ss as LABBE Corentin's sug

[PATCH] crypto: rockchip - use devm_add_action_or_reset()

2016-08-23 Thread Sudip Mukherjee
If devm_add_action() fails we are explicitly calling the cleanup to free the resources allocated. Lets use the helper devm_add_action_or_reset() and return directly in case of error, as we know that the cleanup function has been already called by the helper if there was any error. Signed-off-by:

Re: [PATCH] crypto: rockchip - use devm_add_action_or_reset()

2016-08-23 Thread Heiko Stübner
Am Dienstag, 23. August 2016, 20:28:54 schrieb Sudip Mukherjee: > If devm_add_action() fails we are explicitly calling the cleanup to free > the resources allocated. Lets use the helper devm_add_action_or_reset() > and return directly in case of error, as we know that the cleanup function > has be

crypto: mxs-dcp: do not call blocking ops when !TASK_RUNNING; state=1

2016-08-23 Thread Stefan Wahren
Hi, i'm using a iMX233-OLinuXino board and i get the following warning during boot with 4.8.0-rc2-next-20160819: [2.45] [ cut here ] [2.45] WARNING: CPU: 0 PID: 42 at kernel/sched/core.c:7602 __might_sleep+0x8c/0xa0 [2.47] do not call blocking ops w

Problems with cbc(aes) and do_alg0test()

2016-08-23 Thread Michael McKay
We are writing a device driver with kernel v3.14, and trying to encrypt some data using the Linux kernel algorithm “cbc(aes)”. Our /proc/crypto shows the following is loaded: driver “cbc-aes-aesni”, module “aesni_intel”, and type “ablkcipher”. But crypto_has_alg() gives us an error indicating th

[PATCH v2 2/2] HWRNG: thunderx: Add Cavium HWRNG driver for ThunderX SoC.

2016-08-23 Thread Omer Khaliq
The Cavium ThunderX SoC has a hardware random number generator. This driver provides support using the HWRNG framework. Signed-off-by: Omer Khaliq Signed-off-by: Ananth Jasty Acked-by: David Daney --- drivers/char/hw_random/Kconfig | 13 + drivers/char/hw_random/Makefile|

[PATCH v2 0/2] HWRNG/PCI: Add driver for Cavium Thunder RNG

2016-08-23 Thread Omer Khaliq
There is a hardware error rendering the FDL field incorrect for the some Thunder RNG devices. The first patch adds a PCI quirk to fix the problem. The second patch adds the driver. Changes from v1: Use PCI quirks as advised. Removed unecessary headers Format changes as adv

[PATCH v2 1/2] PCI: quirk fixup for cavium invalid sriov link value.

2016-08-23 Thread Omer Khaliq
From: Ananth Jasty Cavium cn88xx hardware presents an incorrect SR-IOV Function Dependency Link, add a fixup quirk for the affected devices. Acked-by: David Daney Signed-off-by: Ananth Jasty Signed-off-by: Omer Khaliq --- drivers/pci/quirks.c | 11 +++ 1 file changed, 11 insertions(+

Re: [PATCH v2 2/2] HWRNG: thunderx: Add Cavium HWRNG driver for ThunderX SoC.

2016-08-23 Thread Corentin LABBE
Hello > +/* Read data from the RNG unit */ > +static int cavium_rng_read(struct hwrng *rng, void *dat, size_t max, bool > wait) > +{ > + struct cavium_rng *p = container_of(rng, struct cavium_rng, ops); > + unsigned int size = max; > + > + while (size >= 8) { > + *((u64 *)