On 10/12/17 9:24 PM, Brijesh Singh wrote:
>
> On 10/12/17 2:53 PM, Borislav Petkov wrote:
> ...
>
>> Ok, a couple of things here:
>>
>> * Move the checks first and the allocations second so that you allocate
>> memory only after all checks have been passed and you don't allocate
>> pointlessly.
>
On 10/12/17 2:53 PM, Borislav Petkov wrote:
...
> Ok, a couple of things here:
>
> * Move the checks first and the allocations second so that you allocate
> memory only after all checks have been passed and you don't allocate
> pointlessly.
I assume you mean performing the SEV state check befo
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Signed-off-by: Gustavo A. R. Silva
---
drivers/crypto/qat/qat_common/qat_uclo.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/crypto/qat/qat_common/qat_uclo.c
b/drivers/
On Thu, Oct 12, 2017 at 04:52:32PM -0500, Brijesh Singh wrote:
> See my above comment, I think the simplest solution is remove psp->sev_misc
Ok, so far so good.
But now you still need to track which is the last psp device and to call
misc_deregister() only when the last device exits. Because if y
On 10/12/17 4:41 PM, Borislav Petkov wrote:
> On Thu, Oct 12, 2017 at 04:11:18PM -0500, Brijesh Singh wrote:
>> The sev_exit() will be called for all the psp_device instance. we need
>> to set psp_misc_dev = NULL after deregistering the device.
>>
>> if (psp_misc_dev) {
>> misc_deregister(psp_mi
On Thu, Oct 12, 2017 at 04:11:18PM -0500, Brijesh Singh wrote:
> The sev_exit() will be called for all the psp_device instance. we need
> to set psp_misc_dev = NULL after deregistering the device.
>
> if (psp_misc_dev) {
> misc_deregister(psp_misc_dev);
> psp_misc_dev = NULL;
Right, except w
On 10/12/17 9:08 AM, Borislav Petkov wrote:
...
> Well, if you're going to have a global var, why not pull up the misc
> device instead?
>
> And mind you, I've moved out this assignments:
>
> + psp->sev_misc = psp_misc_dev;
> + init_waitqueue_head(&psp->sev_int_queue);
> + dev_
On 10/12/17 3:21 PM, Borislav Petkov wrote:
> On Thu, Oct 12, 2017 at 03:11:07PM -0500, Brijesh Singh wrote:
>> Lets consider this scenario
>> 1- platform is in uninit state, we transition it to INIT
>> 2- PEK_GEN command failed
>> 3- since we have transitioned the platform in INIT state hence w
On Thu, Oct 12, 2017 at 03:21:04PM -0500, Brijesh Singh wrote:
> We need to follow the platform state machine logic defined in SEV spec
> section 5.1.2. The PEK_GEN can not be issued when platform is in WORKING
> state because the command actually re-generate the identity of the
> platform itself (
On Thu, Oct 12, 2017 at 03:11:07PM -0500, Brijesh Singh wrote:
> Lets consider this scenario
> 1- platform is in uninit state, we transition it to INIT
> 2- PEK_GEN command failed
> 3- since we have transitioned the platform in INIT state hence we must
> call the shutdown otherwise we will leave t
On 10/12/17 1:48 PM, Borislav Petkov wrote:
...
> On Fri, Oct 06, 2017 at 08:06:04PM -0500, Brijesh Singh wrote:
>> The SEV_PDH_GEN command is used to re-generate the Platform
>> Diffie-Hellman (PDH) key. The command is defined in SEV spec section
>> 5.9.
>>
>> Cc: Paolo Bonzini
>> Cc: "Radim Kr
On 10/12/17 1:28 PM, Borislav Petkov wrote:
> On Fri, Oct 06, 2017 at 08:06:03PM -0500, Brijesh Singh wrote:
>> The SEV_PEK_GEN command is used to generate a new Platform Endorsement
>> Key (PEK). The command is defined in SEV spec section 5.6.
>>
>> Cc: Paolo Bonzini
>> Cc: "Radim Krčmář"
>> C
On 10/12/17 1:21 PM, Borislav Petkov wrote:
.
> Btw, that function returns 0 unconditionally. So you can make it return
> void and...
Will do
>> +if (ret)
>> +goto unlock;
> ... remove this check and initialize ret to 0 at the beginning.
>
Will do
On Fri, Oct 06, 2017 at 08:06:05PM -0500, Brijesh Singh wrote:
> The SEV_PEK_CSR command can be used to generate a PEK certificate
> signing request. The command is defined in SEV spec section 5.7.
>
> Cc: Paolo Bonzini
> Cc: "Radim Krčmář"
> Cc: Borislav Petkov
> Cc: Herbert Xu
> Cc: Gary Hoo
On Fri, Oct 06, 2017 at 08:06:04PM -0500, Brijesh Singh wrote:
> The SEV_PDH_GEN command is used to re-generate the Platform
> Diffie-Hellman (PDH) key. The command is defined in SEV spec section
> 5.9.
>
> Cc: Paolo Bonzini
> Cc: "Radim Krčmář"
> Cc: Borislav Petkov
> Cc: Herbert Xu
> Cc: Gar
On Fri, Oct 06, 2017 at 08:06:03PM -0500, Brijesh Singh wrote:
> The SEV_PEK_GEN command is used to generate a new Platform Endorsement
> Key (PEK). The command is defined in SEV spec section 5.6.
>
> Cc: Paolo Bonzini
> Cc: "Radim Krčmář"
> Cc: Borislav Petkov
> Cc: Herbert Xu
> Cc: Gary Hook
On Wed, Oct 11, 2017 at 11:50:30AM -0500, Brijesh Singh wrote:
> +static int sev_do_cmd(int cmd, void *data, int *psp_ret)
> +{
> + unsigned int phys_lsb, phys_msb;
> + struct psp_device *psp;
> + unsigned int reg, ret;
> + struct sp_device *sp;
> +
> + sp = sp_get_psp_master_de
On Wed, Sep 13, 2017 at 01:02:12PM +0530, Allen Pais wrote:
> Signed-off-by: Allen Pais
Applied to drm-misc-next, thanks.
-Daniel
> ---
> drivers/gpu/drm/gma500/mid_bios.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/gma500/mid_bios.c
> b/drivers/gp
Hi Herbert,
On 12 October 2017 at 20:00, Herbert Xu wrote:
> On Mon, Sep 18, 2017 at 07:32:37PM +0530, PrasannaKumar Muralidharan wrote:
>> This patch series adds support of pseudo random number generator found
>> in Ingenic's JZ4780 and X1000 SoC.
>>
>> Create cgublock node which has CGU and RNG
On 10/12/2017 10:48 AM, Francois Ozog wrote:
On 12 October 2017 at 16:57, Jonathan Cameron
wrote:
On Thu, 12 Oct 2017 08:31:36 -0500
Douglas Miller wrote:
Not sure if you're already plugged-in to this, but the OpenMP group is
(has been) working on Accelerator support.
http://www.openmp.org/
From: Colin Ian King
The pointer vf_info is being assigned but never read, it is redundant
and therefore can be removed.
Cleans up clang warning: Value stored to 'vf_info' is never read
Fixes: ed8ccaef52fa ("crypto: qat - Add support for SRIOV")
Signed-off-by: Colin Ian King
---
drivers/crypt
From: Colin Ian King
Variable qim is assigned but never read, it is redundant and can
be removed.
Cleans up clang warning: Value stored to 'qim' is never read
Fixes: 4b394a232df7 ("crypto: ccp - Let a v5 CCP provide the same function as
v3")
Signed-off-by: Colin Ian King
---
drivers/crypto/c
From: Colin Ian King
The variable offset is being assigned and not being used; it should
be passed as the 2nd argument to call to function nitrox_write_csr
but has been omitted. Fix this.
Cleans up clang warning: Value stored to 'offset' is never read
Fixes: 14fa93cdcd9b ("crypto: cavium - Add
On 12 October 2017 at 16:57, Jonathan Cameron
wrote:
> On Thu, 12 Oct 2017 08:31:36 -0500
> Douglas Miller wrote:
>
>> Not sure if you're already plugged-in to this, but the OpenMP group is
>> (has been) working on Accelerator support.
>>
>> http://www.openmp.org/updates/openmp-accelerator-suppor
On Fri, Oct 06, 2017 at 03:04:31PM +0200, Christophe Leroy wrote:
> This serie fixes and improves the talitos crypto driver.
>
> First 6 patchs are fixes of failures reported by the new tests in the
> kernel crypto test manager.
>
> The 8 following patches are cleanups and simplifications.
>
> T
On Fri, Sep 29, 2017 at 12:21:04PM +0300, Tudor Ambarus wrote:
> p->key_size, p->p_size, p->g_size are all of unsigned int type.
>
> Signed-off-by: Tudor Ambarus
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~he
On Fri, Sep 29, 2017 at 12:13:08PM +0300, Tudor Ambarus wrote:
> ECDH_KPP_SECRET_MIN_SIZE and params->key_size are both returning
> unsigned values.
>
> Signed-off-by: Tudor Ambarus
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gon
On Wed, Oct 04, 2017 at 01:00:05AM +0200, Christian Lamparter wrote:
> The hmac_mc parameter of set_dynamic_sa_command_1()
> was defined but not used. On closer inspection it
> turns out, it was never wired up.
>
> Signed-off-by: Christian Lamparter
All applied. Thanks.
--
Email: Herbert Xu
H
On Fri, Sep 29, 2017 at 12:21:05PM +0300, Tudor Ambarus wrote:
> DH_KPP_SECRET_MIN_SIZE and dh_data_size() are both returning
> unsigned values.
>
> Signed-off-by: Tudor Ambarus
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.
On Tue, Oct 03, 2017 at 04:19:59AM +0200, Stephan Müller wrote:
> Hi Herbert,
>
> Changes v2:
> * use __be64 for A and R variables
> * eliminate tbe variable
> * use initial IV value with cpu_to_be64 when accessing variable A
>
> ---8<---
>
> The code is simplified by using two __be64 values for
On Sun, Oct 08, 2017 at 10:50:53PM +0200, Jason A. Donenfeld wrote:
> The new stack validator in objdump doesn't like directly assigning r11
> to rsp, warning with something like:
>
> warning: objtool: chacha20_4block_xor_ssse3()+0xa: unsupported stack pointer
> realignment
> warning: objtool: ch
On Sun, Oct 08, 2017 at 11:39:48AM +0200, Christophe JAILLET wrote:
> The first patch is the same as the one committed for crypto/xts.c applied a
> few days ago.
> (commit 5125e4e867ab ("crypto: xts - Fix an error handling path in
> 'create()'")
> in /git/herbert/crypto-2.6.git)
>
> The 2nd one i
On Mon, Sep 25, 2017 at 01:15:00PM +0530, Arvind Yadav wrote:
> pr_err() messages should terminated with a new-line to avoid
> other messages being concatenated onto the end.
>
> Signed-off-by: Arvind Yadav
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~her
On Thu, 12 Oct 2017 08:31:36 -0500
Douglas Miller wrote:
> Not sure if you're already plugged-in to this, but the OpenMP group is
> (has been) working on Accelerator support.
>
> http://www.openmp.org/updates/openmp-accelerator-support-gpus/
>
> Maybe you are talking about a different aspect o
On Mon, Sep 18, 2017 at 07:32:37PM +0530, PrasannaKumar Muralidharan wrote:
> This patch series adds support of pseudo random number generator found
> in Ingenic's JZ4780 and X1000 SoC.
>
> Create cgublock node which has CGU and RNG node as its children. The
> cgublock node uses "simple-bus" compa
Hi Boris,
On mer., oct. 11 2017, Boris Brezillon
wrote:
> Hello,
>
> It's been several releases since we added a new driver to support the
> CESA IP (the new driver was introduced in 4.2). It seems most major
> bugs have been discovered and fixed and now is probably a good time to
> kill the
On 10/12/2017 08:27 AM, Borislav Petkov wrote:
...
+/**
+ * struct sev_user_data_status - PLATFORM_STATUS command parameters
+ *
+ * @major: major API version
+ * @minor: minor API version
+ * @state: platform state
+ * @owner: self-owned or externally owned
+ * @config: platform config flag
On Wed, Oct 11, 2017 at 11:55:21AM -0500, Brijesh Singh wrote:
> The SEV_FACTORY_RESET command can be used by the platform owner to
> reset the non-volatile SEV related data. The command is defined in
> SEV spec section 5.4
>
> Cc: Paolo Bonzini
> Cc: "Radim Krčmář"
> Cc: Borislav Petkov
> Cc:
On Wed, Oct 11, 2017 at 11:50:30AM -0500, Brijesh Singh wrote:
> AMD's new Secure Encrypted Virtualization (SEV) feature allows the
> memory contents of virtual machines to be transparently encrypted with a
> key unique to the VM. The programming and management of the encryption
> keys are handled
Not sure if you're already plugged-in to this, but the OpenMP group is
(has been) working on Accelerator support.
http://www.openmp.org/updates/openmp-accelerator-support-gpus/
Maybe you are talking about a different aspect of accelerator support,
but it seems prudent to involve OpenMP as much
Sparse was giving out a warning for symbols
'cc_set_ree_fips_status' and 'fips_handler'
that they were not declared and need to be
made static. This patch makes both the symbols
static inline, to remove the warnings.
Signed-off-by: Rishabh Hardas
---
drivers/staging/ccree/ssi_fips.h | 4 ++--
1
Hello Kamil,
thank you for the change, please find below a number of minor
review comments.
On 10/09/2017 02:12 PM, Kamil Konieczny wrote:
> Add support for MD5, SHA1, SHA256 hash algorithms for Exynos HW.
> It uses the crypto framework asynchronous hash api.
> It is based on omap-sham.c driver.
Hi Linus:
This push fixes the following issues:
- Crashes in skcipher/shash from zero-length input.
- Fix softirq GFP_KERNEL allocation in shash_setkey_unaligned.
- Error path bug in xts create function.
- Compiler warning regressions in axis and stm32.
Please pull from
git://git.kernel.org/p
On 10/12/2017 12:49 PM, Herbert Xu wrote:
> On Thu, Oct 12, 2017 at 09:39:34AM +, Horia Geantă wrote:
>>
>> Taking ascii art from crypto API docs:
>>
>> DATA ---.
>> v
>> .init() -> .update() -> .final() ! .update() might not be called
>> ^|
On Thu, Oct 12, 2017 at 09:39:34AM +, Horia Geantă wrote:
>
> Taking ascii art from crypto API docs:
>
> DATA ---.
> v
> .init() -> .update() -> .final() ! .update() might not be called
> ^| |at all in this scenario.
>
On 10/12/2017 9:44 AM, Herbert Xu wrote:
> On Wed, Oct 11, 2017 at 12:36:11PM +, Horia Geantă wrote:
>> Hi Herbert,
>>
>> I am evaluating whether ahash implementation in caam crypto driver
>> behaves correctly.
>> One thing I've noticed is that for each ahash tfm there is support for
>> at most
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