Re: invalid opcode: 0000 [#1] SMP [aesni_intel]

On Mon, Oct 23, 2017 at 07:01:32PM +0300, SviMik wrote: > Hi! > > Got the following kernel panic: > > invalid opcode: [#1] SMP > CPU: 0 PID: 1449 Comm: openvpn Not tainted 4.8.13-1.el6.elrepo.x86_64 #1 > cut > Call Trace: > > [] ? enqueue_entity+0x45e/0x6f0 > [] ?

[PATCH 02/12] hwrng: bcm2835-rng: Define a driver private context

Instead of making hwrng::priv host the base register address, define a driver private context, make it per platform device instance and pass it down the different functions. Signed-off-by: Florian Fainelli --- drivers/char/hw_random/bcm2835-rng.c | 55

[PATCH 00/12] bcm63xx-rng conversion to bcm2835-rng

Hi, As it usually happens when there is a fair amount of HW IP block re-use, competing implementations show up. In that case the BCM2835 HWRNG driver and the BCM63xx RNG driver have exactly the same register offsets and this is indeed the same piece of HW. This patch series first prepares the

[PATCH 05/12] hwrng: bcm2835-rng: Use device managed helpers

Now that we have moved the RNG disabling into a hwrng::cleanup callback, we can use the device managed registration operation and remove our remove callback since it won't do anything necessary. Signed-off-by: Florian Fainelli --- drivers/char/hw_random/bcm2835-rng.c | 13

[PATCH 01/12] hwrng: bcm2835-rng: Obtain base register via resource

In preparation for consolidating bcm63xx-rng into bcm2835-rng, make sure that we obtain the base register via platform_get_resource() since we need to support the non-DT enabled MIPS-based BCM63xx DSL SoCs. Signed-off-by: Florian Fainelli ---

[PATCH 03/12] hwrng: bcm2835-rng: Move enabling to hwrng::init

We should be moving the enabling of the HWRNG into a hwrng::init callback since we can be disabled and enabled every time a different hwrng is selected in the system. Signed-off-by: Florian Fainelli --- drivers/char/hw_random/bcm2835-rng.c | 16 1 file

[PATCH 04/12] hwrng: bcm2835-rng: Implementation cleanup callback

We should be disabling the RNG in a hwrng::cleanup callback if we are not longer the system selected RNG, not wait until the device driver is removed. Signed-off-by: Florian Fainelli --- drivers/char/hw_random/bcm2835-rng.c | 12 +--- 1 file changed, 9

[PATCH 07/12] hwrng: bcm2835-rng: Manage an optional clock

One of the last steps before bcm63xx-rng can be eliminated is to manage a clock during hwrng::init and hwrng::cleanup, so fetch it in the probe function, and manage it during these two steps when valid. Signed-off-by: Florian Fainelli ---

[PATCH 06/12] hwrng: bcm2835-rng: Rework interrupt masking

The interrupt masking done for Northstart Plus and Northstar (BCM5301X) is moved from being a function pointer mapped to of_device_id::data into a proper part of the hwrng::init callback. While at it, we also make the of_data be a proper structure indicating the platform specifics, since the day

[PATCH 09/12] hwrng: bcm2835-rng: Add Broadcom MIPS I/O accessors

Broadcom MIPS HW is always strapped to match the system-wide endian such that all I/O access to this RNG block is done with the native CPU endian, account for that. Signed-off-by: Florian Fainelli --- drivers/char/hw_random/bcm2835-rng.c | 13 +++-- 1 file changed,

[PATCH 10/12] dt-bindings: rng: Incorporate brcm,bcm6368.txt binding

Since the same block is used on BCM2835 and BCM6368, merge the bindings and remove the brcm,bcm6368.txt binding document. Signed-off-by: Florian Fainelli --- .../devicetree/bindings/rng/brcm,bcm2835.txt | 22 +++---

[PATCH 11/12] hwrng: bcm2835-rng: Enable BCM2835 RNG to work on BCM63xx platforms

We have now incorporated all necessary functionality for the BCM63xx platforms to successfully migrate over bcm2835-rng, so add the final bits: Kconfig selection and proper platform_device device type matching to keep the same platform device name for registration to work. Signed-off-by: Florian

[PATCH 12/12] hwrng: bcm63xx-rng: Remove since bcm2835-rng takes over

bcm2835-rng is now capable of supporting the BCM63xx hardware, so remove the driver which duplicates the same functionality. Signed-off-by: Florian Fainelli --- drivers/char/hw_random/Kconfig | 13 --- drivers/char/hw_random/Makefile | 1 -

[PATCH 08/12] hwrng: bcm2835-rng: Abstract I/O accessors

In preparation for allowing BCM63xx to use this driver, we abstract I/O accessors such that we can easily change those later on. Signed-off-by: Florian Fainelli --- drivers/char/hw_random/bcm2835-rng.c | 27 +++ 1 file changed, 19 insertions(+), 8

[PATCH 0/2] hwrng: iproc-rng200: Add support for BCM7278

Hi, This patch series adds support for the RNG200 block found on the BCM7278 SoC. This requires us to update the compatible string (and associated binding document) as well as the Kconfig option to make that driver selectable with ARCH_BRCMSTB gating the enabling of such SoCs. Thank you Florian

[PATCH 1/2] dt-bindings: rng: Document BCM7278 RNG200 compatible

BCM7278 includes a RGN200 hardware random number generator, document the compatible string for that version of the IP. Signed-off-by: Florian Fainelli --- Documentation/devicetree/bindings/rng/brcm,iproc-rng200.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)

[PATCH 2/2] hwrng: iproc-rng200: Add support for BCM7278

BCM7278 features a RNG200 hardware random number generator block, add support for this chip by matching the chip-specific compatible string and extending the Kconfig dependencies to allow building on ARCH_BRCMSTB (base platform for 7278). Signed-off-by: Florian Fainelli ---

[PATCH 1/4] crypto: dh - fix double free of ctx->p

From: Eric Biggers When setting the secret with the software Diffie-Hellman implementation, if allocating 'g' failed (e.g. if it was longer than MAX_EXTERN_MPI_BITS), then 'p' was freed twice: once immediately, and once later when the crypto_kpp tfm was destroyed. Fix it by

[PATCH 2/4] crypto: dh - don't permit 'p' to be 0

From: Eric Biggers If 'p' is 0 for the software Diffie-Hellman implementation, then dh_max_size() returns 0. In the case of KEYCTL_DH_COMPUTE, this causes ZERO_SIZE_POINTER to be passed to sg_init_one(), which with CONFIG_DEBUG_SG=y triggers the

[PATCH 0/4] crypto: dh - input validation fixes

From: Eric Biggers This series fixes several corner cases in the Diffie-Hellman key exchange implementations: - With CONFIG_DEBUG_SG=y and the software DH implementation, setting 'p' to 0 caused a BUG_ON(). - Both the software and QAT DH implementations had a double-free

[PATCH 3/4] crypto: qat - fix double free of ctx->p

From: Eric Biggers When setting the secret with the "qat-dh" Diffie-Hellman implementation, if allocating 'g' failed, then 'p' was freed twice: once immediately, and once later when the crypto_kpp tfm was destroyed. Fix it by using qat_dh_clear_ctx() in the error paths, as

[PATCH 4/4] crypto: dh - don't permit 'key' or 'g' size longer than 'p'

From: Eric Biggers The "qat-dh" DH implementation assumes that 'key' and 'g' can be copied into a buffer with size 'p_size'. However it was never checked that that was actually the case, which allowed users to cause a buffer underflow via KEYCTL_DH_COMPUTE. Fix this by

[Part2 PATCH v7 00/38] x86: Secure Encrypted Virtualization (AMD)

This part of Secure Encrypted Virtualization (SEV) patch series focuses on KVM changes required to create and manage SEV guests. SEV is an extension to the AMD-V architecture which supports running encrypted virtual machine (VMs) under the control of a hypervisor. Encrypted VMs have their pages

[Part2 PATCH v7 09/38] crypto: ccp: Build the AMD secure processor driver only with AMD CPU support

From: Borislav Petkov This is AMD-specific hardware so present it in Kconfig only when AMD CPU support is enabled or on ARM64 where it is also used. Signed-off-by: Borislav Petkov Signed-off-by: Brijesh Singh Reviewed-by: Gary R Hook

[Part2 PATCH v7 13/38] crypto: ccp: Add Secure Encrypted Virtualization (SEV) command support

AMD's new Secure Encrypted Virtualization (SEV) feature allows the memory contents of virtual machines to be transparently encrypted with a key unique to the VM. The programming and management of the encryption keys are handled by the AMD Secure Processor (AMD-SP) which exposes the commands for

[Part2 PATCH v7 12/38] crypto: ccp: Add Platform Security Processor (PSP) device support

The Platform Security Processor (PSP) is part of the AMD Secure Processor (AMD-SP) functionality. The PSP is a dedicated processor that provides support for key management commands in Secure Encrypted Virtualization (SEV) mode, along with software-based Trusted Execution Environment (TEE) to

[Part2 PATCH v7 11/38] crypto: ccp: Define SEV key management command id

Define Secure Encrypted Virtualization (SEV) key management command id and structure. The command definition is available in SEV KM spec 0.14 (http://support.amd.com/TechDocs/55766_SEV-KM API_Specification.pdf) Cc: Paolo Bonzini Cc: "Radim Krčmář" Cc:

[Part2 PATCH v7 14/38] crypto: ccp: Implement SEV_FACTORY_RESET ioctl command

The SEV_FACTORY_RESET command can be used by the platform owner to reset the non-volatile SEV related data. The command is defined in SEV spec section 5.4 Cc: Paolo Bonzini Cc: "Radim Krčmář" Cc: Borislav Petkov Cc: Herbert Xu

[Part2 PATCH v7 18/38] crypto: ccp: Implement SEV_PEK_CSR ioctl command

The SEV_PEK_CSR command can be used to generate a PEK certificate signing request. The command is defined in SEV spec section 5.7. Cc: Paolo Bonzini Cc: "Radim Krčmář" Cc: Borislav Petkov Cc: Herbert Xu Cc:

[Part2 PATCH v7 19/38] crypto: ccp: Implement SEV_PEK_CERT_IMPORT ioctl command

The SEV_PEK_CERT_IMPORT command can be used to import the signed PEK certificate. The command is defined in SEV spec section 5.8. Cc: Paolo Bonzini Cc: "Radim Krčmář" Cc: Borislav Petkov Cc: Herbert Xu Cc:

[Part2 PATCH v7 17/38] crypto: ccp: Implement SEV_PDH_GEN ioctl command

The SEV_PDH_GEN command is used to re-generate the Platform Diffie-Hellman (PDH) key. The command is defined in SEV spec section 5.6. Cc: Paolo Bonzini Cc: "Radim Krčmář" Cc: Borislav Petkov Cc: Herbert Xu Cc:

[Part2 PATCH v7 20/38] crypto: ccp: Implement SEV_PDH_CERT_EXPORT ioctl command

The SEV_PDH_CERT_EXPORT command can be used to export the PDH and its certificate chain. The command is defined in SEV spec section 5.10. Cc: Paolo Bonzini Cc: "Radim Krčmář" Cc: Borislav Petkov Cc: Herbert Xu

[Part2 PATCH v7 16/38] crypto: ccp: Implement SEV_PEK_GEN ioctl command

The SEV_PEK_GEN command is used to generate a new Platform Endorsement Key (PEK). The command is defined in SEV spec section 5.6. Cc: Paolo Bonzini Cc: "Radim Krčmář" Cc: Borislav Petkov Cc: Herbert Xu Cc:

[Part2 PATCH v7 15/38] crypto: ccp: Implement SEV_PLATFORM_STATUS ioctl command

The SEV_PLATFORM_STATUS command can be used by the platform owner to get the current status of the platform. The command is defined in SEV spec section 5.5. Cc: Paolo Bonzini Cc: "Radim Krčmář" Cc: Borislav Petkov Cc: Herbert Xu

[Part2 PATCH v7 10/38] crypto: ccp: Define SEV userspace ioctl and command id

Add a include file which defines the ioctl and command id used for issuing SEV platform management specific commands. Cc: Paolo Bonzini Cc: "Radim Krčmář" Cc: Borislav Petkov Cc: Herbert Xu Cc: Gary Hook

Re: [PATCH v2 2/8] crypto: scompress - use sgl_alloc() and sgl_free()

On 1 November 2017 at 15:45, Bart Van Assche wrote: > On Wed, 2017-11-01 at 15:17 +, Ard Biesheuvel wrote: >> On 1 November 2017 at 14:50, Bart Van Assche wrote: >> > On Mon, 2017-10-16 at 15:49 -0700, Bart Van Assche wrote: >> > > Use the

Re: [PATCH v2 2/8] crypto: scompress - use sgl_alloc() and sgl_free()

On Wed, 2017-11-01 at 15:17 +, Ard Biesheuvel wrote: > On 1 November 2017 at 14:50, Bart Van Assche wrote: > > On Mon, 2017-10-16 at 15:49 -0700, Bart Van Assche wrote: > > > Use the sgl_alloc() and sgl_free() functions instead of open coding > > > these functions. > >

Re: [PATCH v2 2/8] crypto: scompress - use sgl_alloc() and sgl_free()

On 1 November 2017 at 14:50, Bart Van Assche wrote: > On Mon, 2017-10-16 at 15:49 -0700, Bart Van Assche wrote: >> Use the sgl_alloc() and sgl_free() functions instead of open coding >> these functions. >> >> Signed-off-by: Bart Van Assche >> Cc:

Re: [PATCH v2 2/8] crypto: scompress - use sgl_alloc() and sgl_free()

On Mon, 2017-10-16 at 15:49 -0700, Bart Van Assche wrote: > Use the sgl_alloc() and sgl_free() functions instead of open coding > these functions. > > Signed-off-by: Bart Van Assche > Cc: Ard Biesheuvel > Cc: Herbert Xu

Re: [PATCH v2 6/8] scsi/ipr: Use sgl_alloc_order() and sgl_free_order()

On 10/30/2017 10:01 PM, Brian King wrote: > On 10/30/2017 03:37 PM, Bart Van Assche wrote: >> On Wed, 2017-10-18 at 15:57 -0500, Brian King wrote: >>> On 10/17/2017 01:19 AM, Hannes Reinecke wrote: On 10/17/2017 12:49 AM, Bart Van Assche wrote: > [ ... ] Not sure if this is a

Re: [PATCH 2/3] staging: ccree: handle limiting of DMA masks

On Tue, Oct 31, 2017 at 11:56:16AM +, Gilad Ben-Yossef wrote: > > - if (!dev->coherent_dma_mask) > - dev->coherent_dma_mask = DMA_BIT_MASK(DMA_BIT_MASK_LEN); > + if (rc) { > + dev_err(dev, "Error: failed in dma_set_mask, mask=%par\n", > +

Re: [PATCH 2/3] staging: ccree: handle limiting of DMA masks

On Tue, Oct 31, 2017 at 11:56:16AM +, Gilad Ben-Yossef wrote: > + dma_mask = (dma_addr_t)(DMA_BIT_MASK(DMA_BIT_MASK_LEN)); > + while (dma_mask > 0x7fffUL) { > + if (dma_supported(_dev->dev, dma_mask)) { > + rc = dma_set_coherent_mask(_dev->dev,

Re: [PATCH 1/3] staging: ccree: copy IV to DMAable memory

On Tue, Oct 31, 2017 at 11:56:15AM +, Gilad Ben-Yossef wrote: > + > + /* The IV we are handed may be allocted from the stack so > + * we must copy it to a DMAable buffer before use. > + */ > + req_ctx->iv = kmalloc(ivsize, GFP_KERNEL); > + memcpy(req_ctx->iv, info,

[PATCH 2/2] crypto: caam - remove unused param of ctx_map_to_sec4_sg()

ctx_map_to_sec4_sg() function, added in commit 045e36780f115 ("crypto: caam - ahash hmac support") has never used the "desc" parameter, so let's drop it. Signed-off-by: Horia Geantă --- drivers/crypto/caam/caamhash.c | 8 1 file changed, 4 insertions(+), 4

[PATCH 1/2] crypto: caam - remove unneeded edesc zeroization

Extended descriptor allocation has been changed by commit dde20ae9d6383 ("crypto: caam - Change kmalloc to kzalloc to avoid residual data") to provide zeroized memory, meaning we no longer have to sanitize its members - edesc->src_nents and edesc->dst_dma. Signed-off-by: Horia Geantă