Re: [PATCH 1/2] crypto: caam: Delete an error message for a failed memory allocation in seven functions

On 2/14/2018 8:31 PM, SF Markus Elfring wrote: > From: Markus Elfring > Date: Wed, 14 Feb 2018 18:22:38 +0100 > > Omit an extra message for a memory allocation failure in these functions. > > This issue was detected by using the Coccinelle software. > >

Re: [PATCH v3 1/4] crypto: AF_ALG AIO - lock context IV

Am Donnerstag, 15. Februar 2018, 08:03:20 CET schrieb Harsh Jain: Hi Harsh, > Even after guarantee of serialization, In the end we will get wrong result > as mentioned above. which destination side cannot decrypt it. What I feel > is scenario of sending 2 of more IOCB in case of AEAD itself is

Re: [PATCH v3 1/4] crypto: AF_ALG AIO - lock context IV

On 15-02-2018 11:58, Stephan Mueller wrote: > Am Donnerstag, 15. Februar 2018, 06:30:36 CET schrieb Harsh Jain: > > Hi Harsh, > >> On 14-02-2018 18:22, Stephan Mueller wrote: >>> Am Mittwoch, 14. Februar 2018, 06:43:53 CET schrieb Harsh Jain: >>> >>> Hi Harsh, >>> Patch set is working fine

[Crypto v5 05/12] cxgb4: Inline TLS FW Interface

Key area size in hw-config file. CPL struct for TLS request and response. Work request for Inline TLS. Signed-off-by: Atul Gupta --- drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 121 ++- drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | 2 +

[Crypto v5 12/12] Makefile Kconfig

Entry for Inline TLS as another driver dependent on cxgb4 and chcr Signed-off-by: Atul Gupta --- drivers/crypto/chelsio/Kconfig| 11 +++ drivers/crypto/chelsio/Makefile | 1 + drivers/crypto/chelsio/chtls/Makefile | 4 3 files changed, 16

[Crypto v5 08/12] chtls: Key program

Program the tx and rx key on chip. Signed-off-by: Atul Gupta --- drivers/crypto/chelsio/chtls/chtls_hw.c | 394 1 file changed, 394 insertions(+) create mode 100644 drivers/crypto/chelsio/chtls/chtls_hw.c diff --git

[Crypto v5 07/12] chcr: Key Macro

Define macro for TLS Key context Signed-off-by: Atul Gupta --- drivers/crypto/chelsio/chcr_algo.h | 42 + drivers/crypto/chelsio/chcr_core.h | 55 +- 2 files changed, 96 insertions(+), 1 deletion(-) diff

[Crypto v5 10/12] chtls: Inline crypto request Tx/Rx

TLS handler for record transmit and receive. Create Inline TLS work request and post to FW. Signed-off-by: Atul Gupta --- drivers/crypto/chelsio/chtls/chtls_io.c | 1867 +++ 1 file changed, 1867 insertions(+) create mode 100644

[Crypto v5 06/12] cxgb4: LLD driver changes to enable TLS

Read FW capability. Read key area size. Dump the TLS record count. Signed-off-by: Atul Gupta --- drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c | 18 +++- drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c| 32 +-- drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h

[Crypto v5 11/12] chtls: Register the chtls Inline TLS with net tls

Add new uld driver for Inline TLS support. Register ULP for chtls. Setsockopt to program key on chip. support AES GCM key size 128. Signed-off-by: Atul Gupta --- drivers/crypto/chelsio/chtls/chtls_main.c | 574 ++ include/uapi/linux/tls.h

[Crypto v5 00/12] Chelsio Inline TLS

Series for Chelsio Inline TLS driver (chtls.ko) Driver use the ULP infrastructure to register chtls as Inline TLS ULP. Chtls use TCP Sockets to transmit and receive TLS record. TCP proto_ops is extended to offload TLS record. T6 adapter provides the following features: -TLS record

[Crypto v5 09/12] chtls: CPL handler definition

CPL handlers for TLS session, record transmit and receive. Signed-off-by: Atul Gupta --- drivers/crypto/chelsio/chtls/chtls_cm.c | 2046 +++ net/ipv4/tcp_minisocks.c|1 + 2 files changed, 2047 insertions(+) create mode

[Crypto v5 01/12] tls: tls_device struct to register TLS drivers

tls_device structure to register Inline TLS drivers with net/tls Signed-off-by: Atul Gupta --- include/net/tls.h | 24 1 file changed, 24 insertions(+) diff --git a/include/net/tls.h b/include/net/tls.h index 936cfc5..6b64510 100644 ---

[Crypto v5 04/12] chtls: structure and macro definiton

Inline TLS state, connection management. Supporting macros definition. Signed-off-by: Atul Gupta --- drivers/crypto/chelsio/chtls/chtls.h| 487 drivers/crypto/chelsio/chtls/chtls_cm.h | 203 + 2 files changed, 690

[Crypto v5 02/12] ethtool: feature for Inline TLS in HW

Signed-off-by: Atul Gupta --- include/linux/netdev_features.h | 2 ++ net/core/ethtool.c | 1 + 2 files changed, 3 insertions(+) diff --git a/include/linux/netdev_features.h b/include/linux/netdev_features.h index b1b0ca7..e1a33b7 100644 ---

[Crypto v5 03/12] support for inline tls

Facility to register Inline TLS drivers to net/tls. Setup TLS_FULL_HW prot to listen on offload device. Cases handled 1. Inline TLS device exists, setup prot for TLS_FULL_HW 2. Atleast one Inline TLS exists, sets TLS_FULL_HW. If non-inline capable device establish connection, move to TLS_SW_TX 3.

Re: [PATCH v3 1/4] crypto: AF_ALG AIO - lock context IV

Am Donnerstag, 15. Februar 2018, 06:30:36 CET schrieb Harsh Jain: Hi Harsh, > On 14-02-2018 18:22, Stephan Mueller wrote: > > Am Mittwoch, 14. Februar 2018, 06:43:53 CET schrieb Harsh Jain: > > > > Hi Harsh, > > > >> Patch set is working fine with chelsio Driver. > > > > Thank you. > > > >>

Re: [PATCH v3 1/4] crypto: AF_ALG AIO - lock context IV

On 14-02-2018 18:22, Stephan Mueller wrote: > Am Mittwoch, 14. Februar 2018, 06:43:53 CET schrieb Harsh Jain: > > Hi Harsh, > >> Patch set is working fine with chelsio Driver. > Thank you. > >> Do we really need IV locking mechanism for AEAD algo because AEAD algo's >> don't support Partial mode

Re: [Crypto v4 12/12] Makefile Kconfig

Hi Atul, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on cryptodev/master] [cannot apply to net/master net-next/master v4.16-rc1 next-20180214] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https

[PATCH 2/2] crypto: bcm: One function call less in do_shash() after error detection

From: Markus Elfring Date: Wed, 14 Feb 2018 22:22:20 +0100 The kfree() function was called in one case by the do_shash() function during error handling even if the passed variable contained a null pointer. * Reorder two function calls at the end. * Add a jump

[PATCH 1/2] crypto: bcm: Delete an error message for a failed memory allocation in do_shash()

From: Markus Elfring Date: Wed, 14 Feb 2018 22:05:11 +0100 Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring ---

[PATCH 0/2] crypto/bcm: Adjustments for do_shash()

From: Markus Elfring Date: Wed, 14 Feb 2018 22:30:07 +0100 Two update suggestions were taken into account from static source code analysis. Markus Elfring (2): Delete an error message for a failed memory allocation One function call less after error detection

[PATCH] crypto: bfin_crc: Delete an error message for a failed memory allocation in bfin_crypto_crc_probe()

From: Markus Elfring Date: Wed, 14 Feb 2018 21:34:54 +0100 Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring ---

[PATCH v3 3/5] crypto: arm/speck - add NEON-accelerated implementation of Speck-XTS

Add an ARM NEON-accelerated implementation of Speck-XTS. It operates on 128-byte chunks at a time, i.e. 8 blocks for Speck128 or 16 blocks for Speck64. Each 128-byte chunk goes through XTS preprocessing, then is encrypted/decrypted (doing one cipher round for all the blocks, then the next round,

[PATCH v3 5/5] crypto: speck - add test vectors for Speck64-XTS

Add test vectors for Speck64-XTS, generated in userspace using C code. The inputs were borrowed from the AES-XTS test vectors, with key lengths adjusted. xts-speck64-neon passes these tests. However, they aren't currently applicable for the generic XTS template, as that only supports a 128-bit

[PATCH v3 4/5] crypto: speck - add test vectors for Speck128-XTS

Add test vectors for Speck128-XTS, generated in userspace using C code. The inputs were borrowed from the AES-XTS test vectors. Both xts(speck128-generic) and xts-speck128-neon pass these tests. Signed-off-by: Eric Biggers --- crypto/testmgr.c | 9 + crypto/testmgr.h |

[PATCH v3 0/5] crypto: Speck support

Hello, This series adds Speck support to the crypto API, including the Speck128 and Speck64 variants. Speck is a lightweight block cipher that can be much faster than AES on processors that don't have AES instructions. We are planning to offer Speck-XTS (probably Speck128/256-XTS) as an option

[PATCH v3 1/5] crypto: add support for the Speck block cipher

Add a generic implementation of Speck, including the Speck128 and Speck64 variants. Speck is a lightweight block cipher that can be much faster than AES on processors that don't have AES instructions. We are planning to offer Speck-XTS (probably Speck128/256-XTS) as an option for dm-crypt and

[PATCH v3 2/5] crypto: speck - export common helpers

Export the Speck constants and transform context and the ->setkey(), ->encrypt(), and ->decrypt() functions so that they can be reused by the ARM NEON implementation of Speck-XTS. The generic key expansion code will be reused because it is not performance-critical and is not vectorizable, while

[PATCH 2/2] crypto: caam: Use common error handling code in four functions

From: Markus Elfring Date: Wed, 14 Feb 2018 19:14:49 +0100 Add jump targets so that a bit of exception handling can be better reused at the end of these functions. Signed-off-by: Markus Elfring --- drivers/crypto/caam/caamalg.c |

[PATCH 1/2] crypto: caam: Delete an error message for a failed memory allocation in seven functions

From: Markus Elfring Date: Wed, 14 Feb 2018 18:22:38 +0100 Omit an extra message for a memory allocation failure in these functions. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring ---

[PATCH 0/2] crypto/caam: Adjustments for eight function implementations

From: Markus Elfring Date: Wed, 14 Feb 2018 19:23:45 +0100 Two update suggestions were taken into account from static source code analysis. Markus Elfring (2): Delete an error message for a failed memory allocation in seven functions Use common error handling

[PATCH v2 03/14] x86/crypto: aesni: Add GCM_INIT macro

Reduce code duplication by introducting GCM_INIT macro. This macro will also be exposed as a function for implementing scatter/gather support, since INIT only needs to be called once for the full operation. Signed-off-by: Dave Watson --- arch/x86/crypto/aesni-intel_asm.S |

[PATCH v2 05/14] x86/crypto: aesni: Merge encode and decode to GCM_ENC_DEC macro

Make a macro for the main encode/decode routine. Only a small handful of lines differ for enc and dec. This will also become the main scatter/gather update routine. Signed-off-by: Dave Watson --- arch/x86/crypto/aesni-intel_asm.S | 293

[PATCH v2 04/14] x86/crypto: aesni: Add GCM_COMPLETE macro

Merge encode and decode tag calculations in GCM_COMPLETE macro. Scatter/gather routines will call this once at the end of encryption or decryption. Signed-off-by: Dave Watson --- arch/x86/crypto/aesni-intel_asm.S | 172 ++ 1 file changed,

[PATCH v2 07/14] x86/crypto: aesni: Split AAD hash calculation to separate macro

AAD hash only needs to be calculated once for each scatter/gather operation. Move it to its own macro, and call it from GCM_INIT instead of INITIAL_BLOCKS. Signed-off-by: Dave Watson --- arch/x86/crypto/aesni-intel_asm.S | 71 --- 1 file

[PATCH v2 08/14] x86/crypto: aesni: Fill in new context data structures

Fill in aadhash, aadlen, pblocklen, curcount with appropriate values. pblocklen, aadhash, and pblockenckey are also updated at the end of each scatter/gather operation, to be carried over to the next operation. Signed-off-by: Dave Watson --- arch/x86/crypto/aesni-intel_asm.S

[PATCH v2 06/14] x86/crypto: aesni: Introduce gcm_context_data

Introduce a gcm_context_data struct that will be used to pass context data between scatter/gather update calls. It is passed as the second argument (after crypto keys), other args are renumbered. Signed-off-by: Dave Watson --- arch/x86/crypto/aesni-intel_asm.S | 115

[PATCH v2 09/14] x86/crypto: aesni: Move ghash_mul to GCM_COMPLETE

Prepare to handle partial blocks between scatter/gather calls. For the last partial block, we only want to calculate the aadhash in GCM_COMPLETE, and a new partial block macro will handle both aadhash update and encrypting partial blocks between calls. Signed-off-by: Dave Watson

[PATCH v2 14/14] x86/crypto: aesni: Update aesni-intel_glue to use scatter/gather

Add gcmaes_crypt_by_sg routine, that will do scatter/gather by sg. Either src or dst may contain multiple buffers, so iterate over both at the same time if they are different. If the input is the same as the output, iterate only over one. Currently both the AAD and TAG must be linear, so copy

[PATCH v2 13/14] x86/crypto: aesni: Introduce scatter/gather asm function stubs

The asm macros are all set up now, introduce entry points. GCM_INIT and GCM_COMPLETE have arguments supplied, so that the new scatter/gather entry points don't have to take all the arguments, and only the ones they need. Signed-off-by: Dave Watson ---

[PATCH v2 12/14] x86/crypto: aesni: Add fast path for > 16 byte update

We can fast-path any < 16 byte read if the full message is > 16 bytes, and shift over by the appropriate amount. Usually we are reading > 16 bytes, so this should be faster than the READ_PARTIAL macro introduced in b20209c91e2 for the average case. Signed-off-by: Dave Watson

[PATCH v2 11/14] x86/crypto: aesni: Introduce partial block macro

Before this diff, multiple calls to GCM_ENC_DEC will succeed, but only if all calls are a multiple of 16 bytes. Handle partial blocks at the start of GCM_ENC_DEC, and update aadhash as appropriate. The data offset %r11 is also updated after the partial block. Signed-off-by: Dave Watson

[PATCH v2 10/14] x86/crypto: aesni: Move HashKey computation from stack to gcm_context

HashKey computation only needs to happen once per scatter/gather operation, save it between calls in gcm_context struct instead of on the stack. Since the asm no longer stores anything on the stack, we can use %rsp directly, and clean up the frame save/restore macros a bit. Hashkeys actually only

[PATCH v2 01/14] x86/crypto: aesni: Merge INITIAL_BLOCKS_ENC/DEC

Use macro operations to merge implemetations of INITIAL_BLOCKS, since they differ by only a small handful of lines. Use macro counter \@ to simplify implementation. Signed-off-by: Dave Watson --- arch/x86/crypto/aesni-intel_asm.S | 298 ++

[PATCH v2 02/14] x86/crypto: aesni: Macro-ify func save/restore

Macro-ify function save and restore. These will be used in new functions added for scatter/gather update operations. Signed-off-by: Dave Watson --- arch/x86/crypto/aesni-intel_asm.S | 53 ++- 1 file changed, 24 insertions(+), 29

[PATCH v2 00/14] x86/crypto gcmaes SSE scatter/gather support

This patch set refactors the x86 aes/gcm SSE crypto routines to support true scatter/gather by adding gcm_enc/dec_update methods. The layout is: * First 5 patches refactor the code to use macros, so changes only need to be applied once for encode and decode. There should be no functional

Re: [PATCH] crypto: nx-842: Delete an error message for a failed memory allocation in nx842_pseries_init()

On Wed, Feb 14, 2018 at 11:17 AM, SF Markus Elfring wrote: > From: Markus Elfring > Date: Wed, 14 Feb 2018 17:05:13 +0100 > > Omit an extra message for a memory allocation failure in this function. > > This issue was detected by using

[PATCH] crypto: nx-842: Delete an error message for a failed memory allocation in nx842_pseries_init()

From: Markus Elfring Date: Wed, 14 Feb 2018 17:05:13 +0100 Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring ---

Re: [PATCH v2 4/6] crypto: virtio: convert to new crypto engine API

On Fri, Jan 26, 2018 at 08:15:32PM +0100, Corentin Labbe wrote: > This patch convert the driver to the new crypto engine API. > > Signed-off-by: Corentin Labbe Acked-by: Michael S. Tsirkin Pls queue when/if rest of changes go in. > --- >

[PATCH 2/2] crypto: omap: Improve a size determination in three functions

From: Markus Elfring Date: Wed, 14 Feb 2018 16:12:05 +0100 Replace the specification of data structures by pointer dereferences as the parameter for the operator "sizeof" to make the corresponding size determination a bit safer according to the Linux coding style

[PATCH 0/2] crypto/omap: Adjustments for three function implementations

From: Markus Elfring Date: Wed, 14 Feb 2018 16:18:19 +0100 Two update suggestions were taken into account from static source code analysis. Markus Elfring (2): Delete error messages for a failed memory allocation Improve size determinations

[PATCH 2/2] crypto: sahara: Improve a size determination in sahara_probe()

From: Markus Elfring Date: Wed, 14 Feb 2018 14:14:05 +0100 Replace the specification of a data structure by a pointer dereference as the parameter for the operator "sizeof" to make the corresponding size determination a bit safer according to the Linux coding style

Re: [PATCH v2 2/6] crypto: engine - Permit to enqueue all async requests

Adding my tested-by for the AEAD part which is new in v2 On 26/01/18 20:15, Corentin Labbe wrote: > The crypto engine could actually only enqueue hash and ablkcipher request. > This patch permit it to enqueue any type of crypto_async_request. > > Signed-off-by: Corentin Labbe

[PATCH 0/2] crypto/sahara: Adjustments for sahara_probe()

From: Markus Elfring Date: Wed, 14 Feb 2018 14:30:28 +0100 Two update suggestions were taken into account from static source code analysis. Markus Elfring (2): Delete an error message for a failed memory allocation Improve a size determination

Re: [PATCH v3 1/4] crypto: AF_ALG AIO - lock context IV

Am Mittwoch, 14. Februar 2018, 06:43:53 CET schrieb Harsh Jain: Hi Harsh, > > Patch set is working fine with chelsio Driver. Thank you. > Do we really need IV locking mechanism for AEAD algo because AEAD algo's > don't support Partial mode operation and Driver are not updating(atleast >

Re: [PATCH v3 4/4] crypto: add CRYPTO_TFM_REQ_IV_SERIALIZE flag

Am Mittwoch, 14. Februar 2018, 06:50:38 CET schrieb Harsh Jain: Hi Harsh, > On 10-02-2018 03:34, Stephan Müller wrote: > > Crypto drivers may implement a streamlined serialization support for AIO > > requests that is reported by the CRYPTO_ALG_SERIALIZES_IV_ACCESS flag to > > the crypto user.

[PATCH 4/4] crypto: ux500: Delete two unnecessary variable initialisations in ux500_cryp_probe()

From: Markus Elfring Date: Wed, 14 Feb 2018 10:56:38 +0100 Two local variables will eventually be set to appropriate pointers a bit later. Thus omit their explicit initialisation at the beginning. Signed-off-by: Markus Elfring ---

[PATCH 3/4] crypto: ux500: Adjust an error message in ux500_cryp_probe()

From: Markus Elfring Date: Wed, 14 Feb 2018 10:47:31 +0100 Replace the function name in this error message so that the same name is mentioned according to what was called before. Signed-off-by: Markus Elfring ---

[PATCH 2/4] crypto: ux500: Adjust two condition checks in ux500_cryp_probe()

From: Markus Elfring Date: Wed, 14 Feb 2018 10:38:44 +0100 The local variable "cryp_error" was used only for two condition checks. * Check the return values from these function calls directly instead. * Delete this variable which became unnecessary with this

[PATCH 1/4] crypto: ux500: Delete an error message for a failed memory allocation in ux500_cryp_probe()

From: Markus Elfring Date: Wed, 14 Feb 2018 10:12:38 +0100 Omit an extra message for a memory allocation failure in this function. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring ---

[PATCH 0/4] Ux500 crypto: Adjustments for ux500_cryp_probe()

From: Markus Elfring Date: Wed, 14 Feb 2018 11:12:34 +0100 A few update suggestions were taken into account from static source code analysis. Markus Elfring (4): Delete an error message for a failed memory allocation Adjust two condition checks Adjust an