buffers for encryption.
I'm returning home on December 11, and hopfeully can do some testing at
that time.
Is there a list of machines (/proc/cpuinfo) on which the problem has shown up
so far?
Regards,
Harald
--
- Harald Welte http://linux.via.com.tw/
--
To unsubscribe from
27; is also correct, as stepping 3 no longer has this
issue.
Chuck, I'd be more than thankful if you could rebase and resubmit as requested.
If not, please drop me a not so i can put it on my todo list.
Acked-by: HaraldWelte
--
- Harald Welte http://linux.via.com.tw/
tra memcpy :(
p.s.: the patch to enable padlock on x86_64 is already in the crypto-dev tree,
as far as I know. Interestingly, I have not observed this problem so far,
despite running dm-crypt on a nano for quite some time.
Cheers,
--
- Harald Welte
Hi Arjan,
On Mon, May 11, 2009 at 01:22:01PM +0200, Arjan Koers wrote:
> Harald Welte wrote:
> >> How can multiple RNGs in current dual-processor setups and in the future
> >> multicore Nano be handled?
> >
> > That's actually a good question. I'll pr
additional
comment/explanation) to this list.
The question is: Since according to MAINTAINERS drivers/char/hw_random is
orphaned, which route should patches go?
Herbert: Do you accept hw_random related patches, or should they go some
different route?
Regards,
--
- Harald Welte http
Fix Kconfig to build via-rng.ko on X86_64 builds, as the VIA Nano
CPU supports x86_64, too.
Signed-off-by: Harald Welte
---
drivers/char/hw_random/Kconfig |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
Support VIA Nano hardware RNG
The VIA Nano CPU supports the same XSTORE instruction based RNG,
but it lacks the MSR present in earlier CPUs.
Signed-off-by: Harald Welte
diff --git a/drivers/char/hw_random/via-rng.c b/drivers/char/hw_random/via-rng.c
index 4e9573c..794aacb 100644
--- a/drivers
Dear Arjan,
On Mon, May 11, 2009 at 02:12:17AM +0200, Arjan Koers wrote:
> Harald Welte wrote:
> > This is a cosmetic change, fixing the MODULE_DESCRIPTION() of via-rng.c
>
> Coincidentally, I was trying to make my RNG work for x86_64 today and I
> was wondering about th
On Mon, May 11, 2009 at 12:03:41AM +0800, Harald Welte wrote:
> [CRYPTO] Support VIA PadLock hardware crypto on x86-64
Sorry, I should have read the list archives before posting.
Please apply the more correct patch from Sebastian Andrzej Siewior
as available since March 14 at
http://www.m
Signed-off-by: Harald Welte
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index 01afd75..39eedd4 100644
--- a/drivers/crypto/Kconfig
+++ b/drivers/crypto/Kconfig
@@ -12,7 +12,7 @@ if CRYPTO_HW
config CRYPTO_DEV_PADLOCK
tristate "Support for VIA PadLock ACE"
-
andom Number Generators (RNG)
* (c) Copyright 2003 Red Hat Inc
+ * (c) Copyright 2009 Harald Welte
*
* derived from
*
@@ -28,6 +29,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -171,7 +173,6 @@ static int via_rng_init(struct hwrng *rng)
return 0
This is a cosmetic change, fixing the MODULE_DESCRIPTION() of via-rng.c
Signed-off-by: Harald Welte
---
drivers/char/hw_random/via-rng.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/char/hw_random/via-rng.c b/drivers/char/hw_random/via-rng.c
index eea0814
d rumors that with the CN / Nano this is
changing. VIA will update the padlock programming manual about that.
Since AFAIK Nano is still only sampling and thre's no end-user product with
that CPU in the market yet, there's no hurry right now.
I'll make sure to ping you
pect there will be a new release for padlock in the CN/Nano at some
not too distant point.
--
- Harald Welte <[EMAIL PROTECTED]> http://laforge.gnumonks.org/
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